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-rw-r--r--projects/linux/io/done/SDHI-refactor-SDHn.yaml4
1 files changed, 4 insertions, 0 deletions
diff --git a/projects/linux/io/done/SDHI-refactor-SDHn.yaml b/projects/linux/io/done/SDHI-refactor-SDHn.yaml
index ecf88f7..869148b 100644
--- a/projects/linux/io/done/SDHI-refactor-SDHn.yaml
+++ b/projects/linux/io/done/SDHI-refactor-SDHn.yaml
@@ -9,6 +9,10 @@ bsp41x:
- 5e0b119a284593bbe5966da6049e2b5272830954 # clk: rcar-gen3: Add set_phase to set SDnCKCR in HS400
- a91a23d1d738335d5a92af0e2a18b1ddbcf3d602 # mmc: renesas_sdhi: Fix SDnCKCR setting in 4TAP SoC
+bsp51x:
+ - 7013e474a179b299f9a2e0e28f87a6de8820d78b # clk: Add support parent clock in set_phase
+ - bbf1b3923dd954f3c904a1aefd983dae76faf7be # mmc: renesas_sdhi: Fix SDnCKCR setting in 4TAP SoC
+
upstream:
- torvalds: a31cf51bf6b4bf78ccb1c9fb40ea6231cf3df433 # clk: renesas: rcar-gen3: Add dummy SDnH clock
- torvalds: 1abd04480866cead7b4129bd03246315b4575334 # clk: renesas: rcar-gen3: Add SDnH clock