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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-09 14:44:14 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-09 16:15:44 +0100 |
| commit | fec98d214a23a6c1f3e31e80bb7fd74342a0d188 (patch) | |
| tree | 806c4b4aeb8837386629fdb062c274f86d046d49 /projects/linux/io/done/SDHI-refactor-SDHn.yaml | |
| parent | c5ad1a2574f7b15637b60c222076def6f4381e04 (diff) | |
bsp-51x-upport-request: Move identical requests to tasks (part 1)
Several upport requests for bsp-51x existed in bsp-41x with the same
patch ID, and were broken out in tasks before.
Move them to the existing tasks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'projects/linux/io/done/SDHI-refactor-SDHn.yaml')
| -rw-r--r-- | projects/linux/io/done/SDHI-refactor-SDHn.yaml | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/projects/linux/io/done/SDHI-refactor-SDHn.yaml b/projects/linux/io/done/SDHI-refactor-SDHn.yaml index ecf88f7..869148b 100644 --- a/projects/linux/io/done/SDHI-refactor-SDHn.yaml +++ b/projects/linux/io/done/SDHI-refactor-SDHn.yaml @@ -9,6 +9,10 @@ bsp41x: - 5e0b119a284593bbe5966da6049e2b5272830954 # clk: rcar-gen3: Add set_phase to set SDnCKCR in HS400 - a91a23d1d738335d5a92af0e2a18b1ddbcf3d602 # mmc: renesas_sdhi: Fix SDnCKCR setting in 4TAP SoC +bsp51x: + - 7013e474a179b299f9a2e0e28f87a6de8820d78b # clk: Add support parent clock in set_phase + - bbf1b3923dd954f3c904a1aefd983dae76faf7be # mmc: renesas_sdhi: Fix SDnCKCR setting in 4TAP SoC + upstream: - torvalds: a31cf51bf6b4bf78ccb1c9fb40ea6231cf3df433 # clk: renesas: rcar-gen3: Add dummy SDnH clock - torvalds: 1abd04480866cead7b4129bd03246315b4575334 # clk: renesas: rcar-gen3: Add SDnH clock |