summaryrefslogtreecommitdiff
path: root/projects/linux/io/V3U-enable_RPC.yaml
diff options
context:
space:
mode:
Diffstat (limited to 'projects/linux/io/V3U-enable_RPC.yaml')
-rw-r--r--projects/linux/io/V3U-enable_RPC.yaml13
1 files changed, 13 insertions, 0 deletions
diff --git a/projects/linux/io/V3U-enable_RPC.yaml b/projects/linux/io/V3U-enable_RPC.yaml
index 01d467b..653df63 100644
--- a/projects/linux/io/V3U-enable_RPC.yaml
+++ b/projects/linux/io/V3U-enable_RPC.yaml
@@ -15,6 +15,8 @@ bsp41x:
- 44c210c0fa36a53c3fb08e95e5a6dad8ad9b345d # arm64: dts: renesas: falcon: Add QSPI flash support
upstream:
+ - next: fff53a551db50f5edecaa0b29a64056ab8d2bbca # memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode
+ - next: 797f082738b10ff397c8d3b7804b747d766e62e6 # dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF
comments:
- because HW access to V3U is still very limited, it is suggested to upport/refactor the driver fixes using locally available boards first
@@ -25,16 +27,27 @@ comments:
- c419cfd7766efb7bbc95d964586ca3668b61cdb7
- not a bugfix, no need to upport now
- needs more investigation if burst read support needs more driver updates
+ - will be refactored to seperate task
- f817442ce56d351a2c69515570ca750edb54622b
- needs more information why the undocumented bits were needed previously
- further investigation showed that the patch is okay, but maybe one bitfield was accidently removed
- asked BSP team for clarification
+ - Renesas Europe upstreamed G2L support providing additional information
+ - BSP team responded, all information complete now
+ - patch will be created on top of G2L support. We wait for the new version
- 3612986e5109c4de99cd3f75caf5bf6c756ef0f0, 85f41a8a4d61f366d1591516349ba2447a59e06f
- no action needed, they revert each other
- 0d37f69cacb3343514380ff4a9c271b746959190
- must be upported before enabling V3U. Otherwise flash memory might get broken, i.e. wrongly fused
- very likely must be refactored. The mixture of regmap and direct register writes does not look good
- RFC v1 sent to an internal mailing list
+ - v1; https://lore.kernel.org/r/20210922091007.5516-1-wsa+renesas@sang-engineering.com
+ - merged
- e05ce4b3ba724c77bd19f138476dc97d27eba824, 44c210c0fa36a53c3fb08e95e5a6dad8ad9b345d
- upstream needs also to refactor RPC clock handling into CPG lib
- rfc v1; https://lore.kernel.org/r/20210913065317.2297-1-wsa+renesas@sang-engineering.com
+ - v1; https://lore.kernel.org/r/20210929064924.1997-1-wsa+renesas@sang-engineering.com
+ - v2; https://lore.kernel.org/r/20211006085836.42155-1-wsa+renesas@sang-engineering.com
+ - b587ed1d5e129cc32ab3c69b9489377bf158b9b6
+ - v1; https://lore.kernel.org/r/20210922085831.5375-1-wsa+renesas@sang-engineering.com
+ - merged