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title: V3U; upport RPC fixes and enable for V3U
team: IO
key: af952030-922c-11eb-a0e9-17a4402ca5c4
status: Active
assignee: Wolfram
bsp41x:
- c419cfd7766efb7bbc95d964586ca3668b61cdb7 # memory: renesas-rpc-if: Use burst read operation
- f817442ce56d351a2c69515570ca750edb54622b # memory: renesas-rpc-if: Do not write to reserved bits
- 3612986e5109c4de99cd3f75caf5bf6c756ef0f0 # memory: renesas-rpc-if: Correct data transfer in Manual mode
- 85f41a8a4d61f366d1591516349ba2447a59e06f # Revert "memory: renesas-rpc-if: Correct data transfer in Manual mode"
- 0d37f69cacb3343514380ff4a9c271b746959190 # memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode
- b587ed1d5e129cc32ab3c69b9489377bf158b9b6 # dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF
- e05ce4b3ba724c77bd19f138476dc97d27eba824 # arm64: dts: renesas: r8a779a0: Add RPC-IF node
- 44c210c0fa36a53c3fb08e95e5a6dad8ad9b345d # arm64: dts: renesas: falcon: Add QSPI flash support
upstream:
comments:
- because HW access to V3U is still very limited, it is suggested to upport/refactor the driver fixes using locally available boards first
- for that, RPC must be enabled in TFA, see github.com/ARM-software/arm-trusted-firmware/commit/6e93392b7a761c43c1f4b5b564fe57c51d806388
- another option is to use Eagle/Condor boards remotely with JFFS2 and check for CRC failures
- using the user-partition on an Eagle board turned out to be sufficient
- c419cfd7766efb7bbc95d964586ca3668b61cdb7
- not a bugfix, no need to upport now
- needs more investigation if burst read support needs more driver updates
- f817442ce56d351a2c69515570ca750edb54622b
- needs more information why the undocumented bits were needed previously
- further investigation showed that the patch is okay, but maybe one bitfield was accidently removed
- asked BSP team for clarification
- 3612986e5109c4de99cd3f75caf5bf6c756ef0f0, 85f41a8a4d61f366d1591516349ba2447a59e06f
- no action needed, they revert each other
- 0d37f69cacb3343514380ff4a9c271b746959190
- must be upported before enabling V3U. Otherwise flash memory might get broken, i.e. wrongly fused
- very likely must be refactored. The mixture of regmap and direct register writes does not look good
- RFC v1 sent to an internal mailing list
- e05ce4b3ba724c77bd19f138476dc97d27eba824, 44c210c0fa36a53c3fb08e95e5a6dad8ad9b345d
- upstream needs also to refactor RPC clock handling into CPG lib
- rfc v1; https://lore.kernel.org/r/20210913065317.2297-1-wsa+renesas@sang-engineering.com
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