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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-02-26 11:59:00 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-03-01 11:54:26 +0100 |
| commit | e68efa8f3dc3a9ab9e230da95f9cbae492dde0f4 (patch) | |
| tree | dc55b8bc675ba8d1c3e12410e8294b71461e7321 /projects/linux/mm/bsp392_r8a77990,5-add-DU-CPG-reset.yaml | |
| parent | c1be5bc05a5259a0e92742ebc3514a823d4f465f (diff) | |
projects: linux: core: clk: Update non-target and comments
Cfr. comments for bsp392_clk_renesas_z_z2_clocks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Diffstat (limited to 'projects/linux/mm/bsp392_r8a77990,5-add-DU-CPG-reset.yaml')
0 files changed, 0 insertions, 0 deletions