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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-02-26 11:59:00 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-03-01 11:54:26 +0100 |
| commit | e68efa8f3dc3a9ab9e230da95f9cbae492dde0f4 (patch) | |
| tree | dc55b8bc675ba8d1c3e12410e8294b71461e7321 | |
| parent | c1be5bc05a5259a0e92742ebc3514a823d4f465f (diff) | |
projects: linux: core: clk: Update non-target and comments
Cfr. comments for bsp392_clk_renesas_z_z2_clocks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
| -rw-r--r-- | projects/linux/bsp-41x-non-target.yaml | 1 | ||||
| -rw-r--r-- | projects/linux/core/bsp41x_clk_renesas.yaml | 4 |
2 files changed, 4 insertions, 1 deletions
diff --git a/projects/linux/bsp-41x-non-target.yaml b/projects/linux/bsp-41x-non-target.yaml index 2b5301a..d373f1c 100644 --- a/projects/linux/bsp-41x-non-target.yaml +++ b/projects/linux/bsp-41x-non-target.yaml @@ -368,3 +368,4 @@ bsp41x: - 2f29e68727f0fbba1636a5dfbe85d4933bdf827f # arm64: dts: r8a7796: Add the emergency node in thermal-zones (This patch is in-house solution now.) - 9bede557ab0ca85e493f90f836849be850d0a399 # arm64: dts: r8a7795: Add the emergency node in thermal-zones (This patch is in-house solution now.) - 424e9ea89c33ee0def5febb51f2f93fc68c30ee8 # arm64: dts: r8a7795-salvator-xs: Add R-Car H3 ES3.0 (2 x 2 GiB) support (This patch is in-house solution now.) + - ff6532cedf1b73081004e7f2b6e38e47e8234040 # clk: renesas: rcar-gen3: Add rounding for Z-clock frequency (This is a local patch file for developers. So we don't need to upport.) diff --git a/projects/linux/core/bsp41x_clk_renesas.yaml b/projects/linux/core/bsp41x_clk_renesas.yaml index 26d2f2a..5589c3d 100644 --- a/projects/linux/core/bsp41x_clk_renesas.yaml +++ b/projects/linux/core/bsp41x_clk_renesas.yaml @@ -7,7 +7,6 @@ bsp41x: - 7a967a750a3409554d72d9bc3842722e86703125 # clk: Add support parent clock in set_phase - 5e0b119a284593bbe5966da6049e2b5272830954 # clk: rcar-gen3: Add set_phase to set SDnCKCR in HS400 - 98599f0aa8efcf43299c95c392c868f74f69eda0 # clk: renesas: rcar-gen3: Add PLL clock and update z-clock for propagating frequency to parent - - ff6532cedf1b73081004e7f2b6e38e47e8234040 # clk: renesas: rcar-gen3: Add rounding for Z-clock frequency - 8be3f69874d57fc2bd3563b47ebca7fe189673b2 # clk: renesas: rcar-gen3: Add support when frequency does not propagate to parent in z clock divider - 226e92814ca5b8ea1ce789869cee131c9bc2a819 # clk: renesas: rcar-gen3: Add support ZG clock divider for R8A77990 - 97a8cbaabb27ab9b53c345798e87ff5de155cf94 # clk: renesas: rcar-gen3: Fix revision of R8A7796 for applying SD_SKIP_FIRST @@ -55,3 +54,6 @@ bsp41x: - e7a6e866fad61e16703ab2433d848926a85f5a8b # clk: renesas: r8a779a0: Add RADSP clocks - 8a6d0d59a9d4d19a1853dd5d6b89b18bc635e348 # clk: renesas: r8a779a0: Add VCPL4 clock - 60151ad45b0ded0aacab6438fbf03631b0f1c14f # clk: renesas: r8a779a0: Add WWDT clocks + +comments: + - "98599f0aa8efcf43299c95c392c868f74f69eda0: We need to upport with refactoring." |