| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2008-04-06 | radeon_ms: check for NULL fb | Jerome Glisse | |
| 2008-04-05 | nv50: primitive i2c interrupt handler | Maarten Maathuis | |
| 2008-04-03 | radeon_ms: add crtc set base callback & fix palette | Jerome Glisse | |
| 2008-04-03 | nv50: primitive display interrupt handler. | Maarten Maathuis | |
| 2008-03-31 | radeon_ms: small fix & cleanup to command checking | Jerome Glisse | |
| 2008-03-31 | nouveau: fix return from function.. | Dave Airlie | |
| dude kernel moduless use kernel errors :) this fixes an oops on init when this codepath hits. | |||
| 2008-03-31 | radeon_ms: initial pass at command buffer validation | Jerome Glisse | |
| 2008-03-30 | nouveau: forgot to add a break | Maarten Maathuis | |
| 2008-03-30 | nouveau: Add ctx values for nv86. | Maarten Maathuis | |
| - Note that this may not work for all nv86. | |||
| 2008-03-30 | radeon_ms: add hang debuging helper functions | Jerome Glisse | |
| 2008-03-30 | drm/r300: fix wait interface mixup | Dave Airlie | |
| This interface was defined completely wrong, however userspace has only ever used 4 values from it (0x1, 0x2, 0x3 and 0x6), so fix the interface to do what userspace actually expected but define new defines for new users to use it properly. | |||
| 2008-03-29 | r300: Correctly translate the value for the R300_CMD_WAIT command. | Oliver McFadden | |
| Previously, the R300_CMD_WAIT command would write the passed directly to the hardware. However this is incorrect because the R300_WAIT_* values used are internal interface values that do not map directly to the hardware. The new function I have added translates the R300_WAIT_* values into appropriate values for the hardware before writing the register. Thanks to John Bridgman for pointing this out. :-) | |||
| 2008-03-27 | radeon_ms: this is a modesetting driver, bring things up to date | Jerome Glisse | |
| 2008-03-25 | nouveau: nv20 bios does not initialise PTIMER | Stuart Bennett | |
| The wait functions depend on PTIMER, so write the old (incorrect, but working) values for uninitialised hw | |||
| 2008-03-24 | i915: fix oops on agp=off | Dave Airlie | |
| Kernel bug 10289. | |||
| 2008-03-24 | Merge branch 'r500-fp' | Dave Airlie | |
| 2008-03-24 | nv40: voodoo - not quite. | Ben Skeggs | |
| 2008-03-24 | nv40: allocate massive amount of PRAMIN for grctx on all chipsets. | Ben Skeggs | |
| More or less a workaround for issues on some chipsets where a context switch results in critical data in PRAMIN being overwritten by the GPU. The correct fix is known, but may take some time before it's a feasible option. | |||
| 2008-03-21 | r500: fragment program upload is also used to upload constants. | Dave Airlie | |
| Limit frag address to 8 bits | |||
| 2008-03-20 | Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm ↵ | Jerome Glisse | |
| into modesetting-101 | |||
| 2008-03-20 | radeon_ms: fix fence | Jerome Glisse | |
| 2008-03-20 | drm: fixup r500fp submission | Dave Airlie | |
| 2008-03-20 | nouveau: do not set on-board timer's numerator/denominator to bad values | Stuart Bennett | |
| 2008-03-19 | RADEON: switch over to new production microcode | Alex Deucher | |
| This needs to be tested thoroughly before pushing to the kernel. | |||
| 2008-03-19 | RADEON: production microcode for all radeons, r1xx-r6xx | Alex Deucher | |
| This updated microcode is not in use yet. | |||
| 2008-03-19 | move some more r300 regs into not allowed on r500 | Dave Airlie | |
| 2008-03-18 | drm: add new rs690 pci id | Dave Airlie | |
| 2008-03-17 | drm: add master set/drop protocol | Dave Airlie | |
| this may not survive long - just need something for testing | |||
| 2008-03-17 | i915: safety check the sarea map still exists | Dave Airlie | |
| 2008-03-17 | initial r500 RS and FP register and upload code | Dave Airlie | |
| 2008-03-17 | drm/pcigart: fix the pci gart to use the drm_pci wrapper. | Dave Airlie | |
| This is the correct fix for the RS690 and hopefully the dma coherent work. For now we limit everybody to a 32-bit DMA mask but it is possible for RS690 to use a 40-bit DMA mask for the GART table itself, and the PCIE cards can use 40-bits for the table entries. Signed-off-by: Dave Airlie <airlied@redhat.com> | |||
| 2008-03-16 | Avoid unnecessary waits for command regulator pause. | Thomas Hellstrom | |
| 2008-03-16 | [via] Remove some leftover vars. | Thomas Hellstrom | |
| 2008-03-16 | [via] The millionth fixup for the millionth-1 attempt to stabilize the AGP | Thomas Hellstrom | |
| DMA command submission. It's worth remembering that all new bright ideas on how to make this command reader work properly and according to docs will probably fail :( Bring in some old code. | |||
| 2008-03-16 | [via] Fix driver after vblank-rework merge. | Thomas Hellstrom | |
| 2008-03-16 | drm/rs690: set AGP_BASE_2 to 0 | Dave Airlie | |
| 2008-03-16 | drm: set rs690 gart base completly. | Dave Airlie | |
| The docs state bits 4-11 represent bits 32-39 of a 40-bit address | |||
| 2008-03-12 | Fix chip family for RV550 | Alex Deucher | |
| 2008-03-13 | nv50: force channel vram access through vm | Ben Skeggs | |
| If we ever want to be able to use the 3D engine we have no choice. It appears that the tiling setup (required for 3D on G8x) is in the page tables. The immediate benefit of this change however is that it's now not possible for a client to use the GPU to render over the top of important engine setup tables, which also live in VRAM. G8x VRAM size is limited to 512MiB at the moment, as we use a 1-1 mapping of real vram pages to their offset within the start of a channel's VRAM DMA object and only populate a single PDE for VRAM use. | |||
| 2008-03-12 | Merge branch 'intel-post-reloc' | Thomas Hellstrom | |
| Conflicts: linux-core/drm_compat.c linux-core/drm_compat.h linux-core/drm_ttm.c shared-core/i915_dma.c Bump driver minor to 13 due to introduction of new relocation type. | |||
| 2008-03-12 | Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into ↵ | Alan Hourihane | |
| modesetting-101 Conflicts: shared-core/i915_dma.c shared-core/i915_drv.h shared-core/i915_irq.c | |||
| 2008-03-12 | Avoid large kmallocs. | Thomas Hellstrom | |
| 2008-03-11 | global hotplug events happen in the pipe A stat register, | Alan Hourihane | |
| they are not pipe A specific. Remove pipe B code. | |||
| 2008-03-11 | Add support for monitor hotplug signals/waits | Alan Hourihane | |
| Also adjust i915 irq handling as it follows the 16bit'ism's of the i8xx series. | |||
| 2008-03-11 | nouveau: move AGP reset to mem_init_agp | Stuart Bennett | |
| Also, power cycle PGRAPH when resetting AGP -- it seems to fix problems encountered by p0g on nv25 | |||
| 2008-03-11 | drm: fix oops on unload. | Dave Airlie | |
| if we are unloading the module, there is no master so therefore no lock | |||
| 2008-03-11 | drm: hopefully fix cursors on 965 | Dave Airlie | |
| 2008-03-10 | Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm ↵ | Jerome Glisse | |
| into modesetting-101 | |||
| 2008-03-10 | rradeon_ms: rework fence code and bring radeon ms up to date | Jerome Glisse | |
| 2008-03-08 | Switch from PIPE_VBLANK to PIPE_EVENT interrupts. | Keith Packard | |
| My 965GM gets interrupts stuck when using the old PIPE_VBLANK interrupt. Switch to the PIPE_EVENT interrupt mechanism, and set the PIPE*STAT registers to use START_VBLANK on 965 and VBLANK on previous chips. | |||
 |
index : renesas/drm.git | |
| libdrm, cloned from git://anongit.freedesktop.org/mesa/drm | Laurent Pinchart |
| summaryrefslogtreecommitdiff |
path: root/shared-core