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authorDave Airlie <airlied@linux.ie>2008-03-16 12:58:07 +1000
committerDave Airlie <airlied@linux.ie>2008-03-16 12:58:07 +1000
commitdd9eb923edd15284113dc12c05fb341ad60f1b46 (patch)
treeadf09ffc676c38bcce54b28766834b4880515b4c /shared-core
parent76946ed83df2e39e3867538e54dc743fecb4f8e8 (diff)
drm: set rs690 gart base completly.
The docs state bits 4-11 represent bits 32-39 of a 40-bit address
Diffstat (limited to 'shared-core')
-rw-r--r--shared-core/radeon_cp.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index ac46da38..b1fd6d3b 100644
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -1394,8 +1394,9 @@ static void radeon_set_rs690gart(drm_radeon_private_t * dev_priv, int on)
temp = RS690_READ_MCIND(dev_priv, RS690_MC_GART_FEATURE_ID);
RS690_WRITE_MCIND(RS690_MC_GART_FEATURE_ID, 0x42040800);
- RS690_WRITE_MCIND(RS690_MC_GART_BASE,
- dev_priv->gart_info.bus_addr);
+ temp = dev_priv->gart_info.bus_addr & 0xfffff000;
+ temp |= (upper_32_bits(dev_priv->gart_info.bus_addr) & 0xff) << 4;
+ RS690_WRITE_MCIND(RS690_MC_GART_BASE, temp);
temp = RS690_READ_MCIND(dev_priv, RS690_MC_AGP_MODE_CONTROL);
RS690_WRITE_MCIND(RS690_MC_AGP_MODE_CONTROL, 0x01400000);