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authorDave Airlie <airlied@redhat.com>2008-03-17 07:05:46 +1000
committerDave Airlie <airlied@redhat.com>2008-03-17 07:05:46 +1000
commit1f96e9a98245b18c99cc6a7e66372a076b9abf6b (patch)
tree2faf45565071d9d7904629eaeb063a1f159dbb97 /shared-core
parent1a2d8c4bfa96dd176ec084811ad286f95968ee52 (diff)
drm/pcigart: fix the pci gart to use the drm_pci wrapper.
This is the correct fix for the RS690 and hopefully the dma coherent work. For now we limit everybody to a 32-bit DMA mask but it is possible for RS690 to use a 40-bit DMA mask for the GART table itself, and the PCIE cards can use 40-bits for the table entries. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'shared-core')
-rw-r--r--shared-core/r128_cce.c1
-rw-r--r--shared-core/radeon_cp.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/shared-core/r128_cce.c b/shared-core/r128_cce.c
index 204ea37d..995c6f2e 100644
--- a/shared-core/r128_cce.c
+++ b/shared-core/r128_cce.c
@@ -558,6 +558,7 @@ static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
#if __OS_HAS_AGP
if (dev_priv->is_pci) {
#endif
+ dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
dev_priv->gart_info.gart_table_location = DRM_ATI_GART_MAIN;
dev_priv->gart_info.table_size = R128_PCIGART_TABLE_SIZE;
dev_priv->gart_info.addr = NULL;
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index 66098f91..e0d7751f 100644
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -1819,6 +1819,7 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
} else
#endif
{
+ dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
/* if we have an offset set from userspace */
if (dev_priv->pcigart_offset_set) {
dev_priv->gart_info.bus_addr =