| Age | Commit message (Expand) | Author |
|---|
| 2007-03-13 | nouveau: associate all created objects with a channel + cleanups | Ben Skeggs |
| 2007-03-13 | nouveau: s/fifo/channel/ | Ben Skeggs |
| 2007-03-13 | Corrected values written to R300_RB3D_DSTCACHE_CTLSTAT to either | Oliver McFadden |
| 2007-03-13 | Guess another unknown register used for R300 pacification. | Oliver McFadden |
| 2007-03-11 | nouveau: PUT,GET, not 2xPUT | Patrice Mandin |
| 2007-02-11 | Sync r300_reg.h from mesa driver. #10210 | Aapo Tahkola |
| 2007-03-10 | Merge branch 'i915-pageflip' | Michel Dänzer |
| 2007-03-10 | i915: Only wait for pending flips before asynchronous flips again. | Michel Dänzer |
| 2007-03-09 | i915: Do not wait for pending flips on both pipes at the same time. | Michel Dänzer |
| 2007-03-07 | nouveau: remove a hack that's not needed since the last interface change. | Ben Skeggs |
| 2007-03-07 | nouveau: ack PFIFO interrupts at PFIFO, not PMC. | Ben Skeggs |
| 2007-03-07 | Add via CX700. | Thomas Hellstrom |
| 2007-03-04 | radeon: make PCI GART aperture size variable, but making table size variable | Dave Airlie |
| 2007-03-04 | ati: make pcigart code able to handle variable size PCI GART aperture | Dave Airlie |
| 2007-02-28 | i915: Eliminate dev_priv->current_page. | Michel Dänzer |
| 2007-02-28 | i915: Only clean up page flipping when the last client goes away, not any one. | Michel Dänzer |
| 2007-02-28 | i915: Don't emit waits for pending flips before emitting synchronous flips. | Michel Dänzer |
| 2007-02-28 | i915: Fix test for synchronous flip affecting both pipes. | Michel Dänzer |
| 2007-02-28 | nouveau: intrusive drm interface changes | Ben Skeggs |
| 2007-02-25 | drm: remove unnecessary NULL checks, and fix some indents.. | Jakob Bornecrantz |
| 2007-02-22 | i915: Add support for scheduled buffer swaps to be done as flips. | Michel Dänzer |
| 2007-02-22 | Add DRM_VBLANK_FLIP. | Michel Dänzer |
| 2007-02-19 | i915: Improved page flipping support, including triple buffering. | Michel Dänzer |
| 2007-02-19 | i915: Page flipping enhancements. | Michel Dänzer |
| 2007-02-19 | i915: Unify breadcrumb emission. | Michel Dänzer |
| 2007-02-16 | Simple fence object sample driver for via, based on idling the GPU. | Thomas Hellstrom |
| 2007-02-15 | Initial support for fence object classes. | Thomas Hellstrom |
| 2007-02-14 | Merge branch 'ttm-vram-0-1-branch' | Thomas Hellstrom |
| 2007-02-14 | Remove an intel-specific hack and replace it with a fence driver callback. | Thomas Hellstrom |
| 2007-02-14 | nouveau: fix the build on big endian (thanks CyberFoxx) | Stephane Marchesin |
| 2007-02-14 | nouveau: fix memory initialization with multiple cards. | B. Rathmann |
| 2007-02-13 | Bugzilla Bug #9457 | Thomas Hellstrom |
| 2007-02-12 | Update flags and comments. | Thomas Hellstrom |
| 2007-02-09 | I915 accelerated blit copy functional. | Thomas Hellstrom |
| 2007-02-07 | Warning fix: correct type of i915_mmio argument. | Eric Anholt |
| 2007-02-07 | Define __iomem for systems without it. | Eric Anholt |
| 2007-02-07 | Add chip family flags to i915 driver, and fix a missing '"' in mach64 ID list. | Eric Anholt |
| 2007-02-07 | Checkpoint commit. | Thomas Hellstrom |
| 2007-02-06 | Implement a policy for selecting memory types. | Thomas Hellstrom |
| 2007-02-06 | nouveau: more work on the nv04 context switch code. | Stephane Marchesin |
| 2007-02-03 | nouveau: and of course, I was missing the last nv04 piece. | Stephane Marchesin |
| 2007-02-03 | nouveau: plugin the nv04 graph init function. | Stephane Marchesin |
| 2007-02-03 | nouveau: cleanup the nv04 pgraph save/restore mechanism. | Stephane Marchesin |
| 2007-02-03 | nouveau: fix nv04 graph routines for new register names. | Stephane Marchesin |
| 2007-02-03 | nouveau: rename registers to their proper names. | Stephane Marchesin |
| 2007-02-03 | nouveau: add NV04 registers required for PGRAPH context switching. | Stephane Marchesin |
| 2007-02-02 | nouveau: nv ctx switch opps the size of array was wrong | Matthieu Castet |
| 2007-02-02 | nouveau: nv10 ctx switch, some regs are nv17+ only | Matthieu Castet |
| 2007-02-02 | via: Try to improve command-buffer chaining. | Thomas Hellstrom |
| 2007-02-02 | Disable AGP DMA for chips with the new 3D engine. | Thomas Hellstrom |
