| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-11-17 | Drop shared-core, bsd-core, linux-core and scripts subdirs | Kristian Høgsberg | |
| 2007-11-14 | nouveau: funcs to determine active channel on PFIFO. | Ben Skeggs | |
| 2007-11-05 | drm: remove lots of spurious whitespace. | Dave Airlie | |
| Kernel "cleanfile" script run. | |||
| 2007-08-10 | nouveau/nv50: demagic instmem setup. | Ben Skeggs | |
| 2007-08-08 | nouveau : nv10, nv20, nv30 : don't save all channel in the same RAMFC entry | Matthieu Castet | |
| This should improve multi fifo | |||
| 2007-08-06 | nouveau: Pass channel struct around instead of channel id. | Ben Skeggs | |
| 2007-07-13 | nouveau: nuke internal typedefs, and drm_device_t use. | Ben Skeggs | |
| 2007-07-09 | nouveau/nv50: Initial channel/object support | Ben Skeggs | |
| Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80. | |||
| 2007-07-09 | nouveau: rewrite gpu object code | Ben Skeggs | |
| Allows multiple references to a single object, needed to support PCI(E)GART scatter-gather DMA objects which would quickly fill PRAMIN if each channel had its own. Handle per-channel private instmem areas. This is needed to support NV50, but might be something we want to do on earlier chipsets at some point? Everything that touches PRAMIN is a GPU object. | |||
| 2007-06-28 | nouveau/nv10: Fix earlier NV1x chips | Ben Skeggs | |
| Can't use nv04 code for them, since an extra field was inserted into RAMFC after DMA_PUT/GET. | |||
| 2007-06-28 | nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bit | Ben Skeggs | |
| 2007-06-24 | nouveau: NV1X/2X/3X PFIFO engtab functions | Ben Skeggs | |
| Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC entry size. | |||
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index : renesas/drm.git | |
| libdrm, cloned from git://anongit.freedesktop.org/mesa/drm | Laurent Pinchart |
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