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2015-06-29Add blob property create/destroy ioctl wrappersDaniel Stone
v2: Use memclear to zero out structure. Signed-off-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Rob Clark <robclark@freedesktop.org>
2015-06-29Support atomic modesetting ioctlVille Syrjälä
Add support for the atomic modesetting ioctl through a property-set API. v1: Squashed intermediate patches from Ville, Rob and myself. Updated for current kernel interface (no blobs). v2: Rewrite user-facing API to provide transactional/cursor interface. Use memclear to zero out ioctl. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Rob Clark <robclark@freedesktop.org> Signed-off-by: Daniel Stone <daniels@collabora.com> v3 [Emil Velikov]: Remove DRM_CAP_ATOMIC - superseded by DRM_CLIENT_CAP_ATOMIC. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-21nouveau: add coherent BO attributeAlexandre Courbot
Add a flag allowing Nouveau to specify that an object should be coherent at allocation time. This is required for some class of objects like fences which are randomly-accessed by both the CPU and GPU. This flag instructs the kernel driver to make sure the object remains coherent even on architectures for which coherency is not guaranteed by the bus. Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2015-03-19intel: Merge latest i915_drm.hNeil Roberts
The main incentive to do this is to get I915_PARAM_REVISION. v2: Rebase on top of some changes that were made to the header without copying the whole file from the kernel source. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Neil Roberts <neil@linux.intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-03-18intel: Export total subslice and EU countsJeff McGee
Update kernel interface with new I915_GETPARAM ioctl entries for subslice total and EU total. Add a wrapping function for each parameter. Userspace drivers need these values when constructing GPGPU commands. This kernel query method is intended to replace the PCI ID-based tables that userspace drivers currently maintain. The kernel driver can employ fuse register reads as needed to ensure the most accurate determination of GT config attributes. This first became important with Cherryview in which the config could differ between devices with the same PCI ID. The kernel detection of these values is device-specific. Userspace drivers should continue to maintain ID-based tables for older devices which return ENODEV when using this query. v2: remove unnecessary include of <stdbool.h> and increment the I915_GETPARAM indices to match updated kernel patch. For: VIZ-4636 Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Jeff McGee <jeff.mcgee@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2015-01-05Add new DRM_MODE_CONNECTOR and _ENCODER definesAdam Cheney
Update drm_mode.h defines from kernel upstream for connector and encoder types to expose DSI and other newly defined types. Signed-off-by: Adam Cheney <acheney@nvidia.com> Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-11-27tegra: Add SET/GET_FLAGS IOCTLsThierry Reding
The DRM_TEGRA_GEM_SET_FLAGS IOCTL can be used to set the flags of a buffer object after it has been allocated or imported. Flags associated with a buffer object can be queried using the DRM_TEGRA_GEM_GET_FLAGS IOCTL. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-27tegra: Add GET/SET_TILING IOCTLsThierry Reding
Currently the tiling parameters of buffer objects can only be set at allocation time, and only a single tiled mode is supported. This new DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also allows the tiling mode to be changed after the allocation. This will enable the Tegra DRM driver to import buffers from a GPU and directly scan them out by configuring the display controller appropriately. To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the current tiling mode of a buffer object. This is necessary when importing buffers via handle (as is done in Mesa for example) so that userspace can determine the proper parameters for the 2D or 3D engines. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-27libdrm: Add NVIDIA Tegra supportThierry Reding
Add the libdrm_tegra helper library to encapsulate Tegra-specific interfaces to the DRM. Furthermore, Tegra is added to the list of supported chips in the modetest and vbltest programs. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-24update signed/object prop typesRob Clark
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-09-28Remove i810_drm.h and i830_drm.h from the distribution tarballEmil Velikov
Both of these headers are not installed since they were imported. They are not even used internally. The latter no longer exist in the kernel... Note the * symbol in EXTRA_DIST causes 'make distcheck' to fail. When was the last time we ran it ? Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Damien Lespiau <damien.lespiau@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Jakob Bornecrantz <jakob@vmware.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-28automake: remove obsolete makefilesEmil Velikov
Rather than having two extra makefiles in order to ship ~10 headers just fold its 5 lines of code into the top one makefile. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2014-09-01libdrm, freedreno, intel, nouveau, radeon: add Makefile.sourcesEmil Velikov
Will be used to consolidate the required sources lists as well as the install-able headers. This is turn will help us to avoid the duplication with the upcoming Android build support. v2: Rename the headers variable to *_H_FILES. v3: Rebase on top of symbol visibility patches. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-07-28libdrm: Fix drm.h include in qxl drm header fileAndreas Boll
Use "drm.h" instead of "drm/drm.h" as used in the other header files. Fixes xserver-xorg-video-qxl build with KMS support on Debian, where this file is installed in /usr/include/libdrm. Fixes Debian bug #746807 Reported-by: Bastian Blank <waldi@debian.org> Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-06-19intel: Add new userptr ioctlTvrtko Ursulin
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
2014-06-19intel: Sync typo fix from the kernel sources.Damien Lespiau
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-06-19intel: Sync the command parser version parameter from kernelDamien Lespiau
Cc: Bradley Volkin <bradley.d.volkin@intel.com> Reviewed-by: Brad Volkin <bradley.d.volkin@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-05-19drm: Add universal plane capability bit and plane type enumsMatt Roper
Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-04-04radeon: sync with radeon_drm.h from kernel headersMarek Olšák
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-01-10intel: Merge latest i915_drm.hBen Widawsky
This was not done as a straight copy because reset_stats IOCTL landed in libdrm before upstream kernel. Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-12-03Bump the version to 2.4.50Marek Olšák
2013-11-23radeon: implement 2D tiling for CIKMarek Olšák
Bug fixes and simplification by Marek. We have to use the tile index of 0 for non-MSAA depth-stencil after all. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-15intel: Add support for GPU reset status query ioctlIan Romanick
I would have just used the drmIoctl interface directly in Mesa, but the ioctl needs some data from the drm_intel_context that is not exposed outside libdrm. This ioctl is in the drm-intel-next tree as b635991. v2: Update based on Mika's kernel work. v3: Fix compile failures from last-minute typos. Sigh. v4: Import the actual changes from the kernel i915_drm.h. Only comments on some fields of drm_i915_reset_stats differed. There are still some deltas between the kernel i915_drm.h and the one in libdrm, but those can be resolved in other patches. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v3] Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-08Revert "intel: Add support for GPU reset status query ioctl"Dave Airlie
This reverts commit 6335e1d28c422050024bcf4100c4fb3a5bac2afb. No taxation without representation, in other words no userspace without kernel stuff being in a stable location, either drm-next but I'll accept drm-intel-next for intel specific stuff.
2013-11-07intel: Add support for GPU reset status query ioctlIan Romanick
I would have just used the drmIoctl interface directly in Mesa, but the ioctl needs some data from the drm_intel_context that is not exposed outside libdrm. v2: Update based on Mika's kernel work. v3: Fix compile failures from last-minute typos. Sigh. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-06Add DRM_MODE_PAGE_FLIP_ASYNC defineKeith Packard
This exposes the kernel API for performing asynchronous flips Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2013-09-30drm: Sync the DRM_SET_CLIENT_CAP ioctl definitionDamien Lespiau
v2: SET_CAP -> SET_CLIENT_CAP renaming Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-09-30drm: Synchronize the stereo 3D mode flags from the kernel headersDamien Lespiau
v2: stereo layouts are now an enum (Daniel Vetter) Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-09-22libdrm: Make some drm headers compatible with gcc -std=c89 -pedanticDaniel Kurtz
The following minor changes were needed to these headers: * Convert // comments to /* */ * No , after final member of enum With these changes, these header files can be included by a program that is built with gcc options: -std=c89 -Werror -pedantic Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net>
2013-09-18radeon: Fix tiling mode index for 1D tiled depth/stencil surfaces on CIKMichel Dänzer
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-04libdrm: add missing DRM_CAP_TIMESTAMP_MONOTONICImre Deak
Just add the definition according the kernel's copy of drm.h Signed-off-by: Imre Deak <imre.deak@intel.com>
2013-07-02drm: add hotspot cursor interface support.Dave Airlie
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-05-09drm: add qxl drm header fileDave Airlie
Now that this driver is merged add the header file. Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-04-27intel: Add support for VEBOX ring (v2)Xiang, Haihao
v2: Fix the test for has_vebox Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-12radeon: update radeon_drm.h to kernel last API additions v2Jerome Glisse
v2: sync with radeon-next tree for 3.10 http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.10-wip Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2012-08-10intel: Import updated i915_drm.h.Eric Anholt
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2012-07-16libdrm: add prime fd->handle and handle->fd interfacesDave Airlie
These are just basic ioctl wrappers around the prime ioctls, along with the capability reporting. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-07-16libdrm: add missing caps from kernel to drm.hDave Airlie
This just moves over some missing caps from the kernel. Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-06-27intel: updated header for contextsBen Widawsky
Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-By: Kenneth Graunke <kenneth@whitecape.org>
2012-06-08Add support for bitmask propertiesRob Clark
A bitmask property is similar to an enum. The enum value is a bit position (0-63), and valid property values consist of a mask of zero or more of (1 << enum_val[n]). Signed-off-by: Rob Clark <rob@ti.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2012-06-08Add support for generic object properties IOCTLsPaulo Zanoni
New library calls: - drmModeObjectGetProperties - drmModeFreeObjectProperties - drmModeObjectSetProperties Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Rob Clark <rob@ti.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2012-06-06intel: wait render header updatesBen Widawsky
make headers_install in kernel. Copy to here. v2: signed ns_timeout Acked-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-06intel: sanitize i915_drm.hBen Widawsky
run make headers_isntall on d-i-n, copy to here Acked-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-04-11libdrm: update drm headers from kernel for prime/dmabufRob Clark
Sync drm.h with from kernel headers for the new PRIME_HANDLE_TO_FD and PRIME_FD_TO_HANDLE ioctls from Dave Airlie's "drm: base prime/ dma-buf support (v5)" kernel patch. Signed-off-by: Rob Clark <rob@ti.com>
2012-03-05Make drm/drm_fourcc.h portable to non-linux platformsAlan Coopersmith
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
2012-02-01radeon: add surface allocator helper v10Jerome Glisse
The surface allocator is able to build complete miptree when allocating surface for r600/r700/evergreen/northern islands GPU family. It also compute bo size and alignment for render buffer, depth buffer and scanout buffer. v2 fix r6xx/r7xx 2D tiling width align computation v3 add tile split support and fix 1d texture alignment v4 rework to more properly support compressed format, split surface pixel size and surface element size in separate fields v5 support texture array (still issue on r6xx) v6 split surface value computation and mipmap tree building, rework eg and newer computation v7 add a check for tile split and 2d tiled v8 initialize mode value before testing it in all case, reenable 2D macro tile mode on r6xx for cubemap and array. Fix cubemap to force array size to the number of face. v9 fix handling of stencil buffer on evergreen v10 on evergreen depth buffer need to have enough room for a stencil buffer just after depth one Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-02-01intel: query for LLC supportEugeni Dodonov
This adds support for querying the kernel about the LLC support in the hardware. In case the ioctl fails, we assume that it is present on GEN6 and GEN7. v2: fix the return code checking Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
2012-01-09intel: add sprite ioctl defines and struct for i915 sprite codeJesse Barnes
2012-01-04intel: Update for new i915_drm.h defines.Eric Anholt
2011-12-13libdrm: update drm headers from kernel, including new overlay ioctls & structsJesse Barnes
Add structs and functions necessary for the new plane and fb handling code, including a new header, drm_fourcc.h, that includes the surface formats supported by various DRM drivers. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-27 14:33:52 +0000