summaryrefslogtreecommitdiff
path: root/intel/intel_decode.c
diff options
context:
space:
mode:
authorKenneth Graunke <kenneth@whitecape.org>2013-03-01 15:37:01 -0800
committerKenneth Graunke <kenneth@whitecape.org>2013-03-28 13:24:15 -0700
commitca678bc073462623cfc89dea80271bc361f1655f (patch)
tree697909ec62a16e88a376756cca32403d7adf00d5 /intel/intel_decode.c
parent1eb2860b4bd0306dddc5b2f2dc7403aa65c5e476 (diff)
intel: Fix Haswell CRW PCI IDs.
The second digit was off by one, which meant we accidentally treated GT(n) as GT(n-1). This also meant no support for GT1 at all. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'intel/intel_decode.c')
0 files changed, 0 insertions, 0 deletions