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authorhornet <hornet@0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652>2013-12-16 11:31:42 +0000
committerhornet <hornet@0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652>2013-12-16 11:31:42 +0000
commit6620a37c5879805026781e1fe1981faa57700116 (patch)
tree44f0854f48d79e95bd743029e12cb30d8dbae005
parentfb2e84df6de7700d3ae6887e4e63622bc35490eb (diff)
2.3.2 MMIO: Configuration space offset corrected
The offset in the MMIO configuration space description (table 4.1) became wrong at some time (0x0fff). Fixed. Signed-off-by: Pawel Moll <pawel.moll@arm.com> git-svn-id: https://tools.oasis-open.org/version-control/svn/virtio@177 0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652
-rw-r--r--content.tex4
1 files changed, 2 insertions, 2 deletions
diff --git a/content.tex b/content.tex
index 0089846..797ee3e 100644
--- a/content.tex
+++ b/content.tex
@@ -1590,9 +1590,9 @@ All register values are organized as Little Endian.
}
\hline
\mmioreg{Config}{Configuration space}{0x100+}{RW}{
- Device-specific configuration space starts at an offset 0x0ff
+ Device-specific configuration space starts at the offset 0x100
and is accessed with byte alignment. Its meaning and size
- depends on the device and the driver.
+ depend on the device and the driver.
}
\hline
\end{longtable}