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authorrusty <rusty@0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652>2013-09-04 02:01:08 +0000
committerrusty <rusty@0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652>2013-09-04 02:01:08 +0000
commit1c403ad2eead135eb4fbb0adfc1a302bcc182938 (patch)
treec3b887f60a21684949947034fd7f8311e5f7bd74
parent9ef9ca824beaa2069c7a02982daf7bc2ab72124e (diff)
2.4.2.2 Define all MMIO registers as little endian
Port of draft commit 88f37f9ec178b664213b77211fec03687b87958b. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Rusty Russell <rusty@au1.ibm.com> git-svn-id: https://tools.oasis-open.org/version-control/svn/virtio@31 0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652
-rw-r--r--virtio-v1.0-wd01-part1-specification.txt5
1 files changed, 3 insertions, 2 deletions
diff --git a/virtio-v1.0-wd01-part1-specification.txt b/virtio-v1.0-wd01-part1-specification.txt
index bc2de67..0531125 100644
--- a/virtio-v1.0-wd01-part1-specification.txt
+++ b/virtio-v1.0-wd01-part1-specification.txt
@@ -995,8 +995,9 @@ Virtual queue size is the number of elements in the queue,
therefore size of the descriptor table and both available and
used rings.
-The endianness of the registers follows the native endianness of
-the Guest. Writing to registers described as “R” and reading from
+All register values are organized as Little Endian.
+
+Writing to registers described as “R” and reading from
registers described as “W” is not permitted and can cause
undefined behavior.