/* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*- * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com * * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: * Jeff Hartmann * Keith Whitwell * * Rewritten by: * Gareth Hughes */ #ifndef __MGA_DRM_H__ #define __MGA_DRM_H__ #include "drm.h" /* WARNING: If you change any of these defines, make sure to change the * defines in the Xserver file (mga_sarea.h) */ #ifndef __MGA_SAREA_DEFINES__ #define __MGA_SAREA_DEFINES__ /* WARP pipe flags */ #define MGA_F 0x1 /* fog */ #define MGA_A 0x2 /* alpha */ #define MGA_S 0x4 /* specular */ #define MGA_T2 0x8 /* multitexture */ #define MGA_WARP_TGZ 0 #define MGA_WARP_TGZF (MGA_F) #define MGA_WARP_TGZA (MGA_A) #define MGA_WARP_TGZAF (MGA_F|MGA_A) #define MGA_WARP_TGZS (MGA_S) #define MGA_WARP_TGZSF (MGA_S|MGA_F) #define MGA_WARP_TGZSA (MGA_S|MGA_A) #define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) #define MGA_WARP_T2GZ (MGA_T2) #define MGA_WARP_T2GZF (MGA_T2|MGA_F) #define MGA_WARP_T2GZA (MGA_T2|MGA_A) #define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) #define MGA_WARP_T2GZS (MGA_T2|MGA_S) #define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) #define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) #define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) #define MGA_MAX_G200_PIPES 8 /* no multitex */ #define MGA_MAX_G400_PIPES 16 #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES #define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ #define MGA_CARD_TYPE_G200 1 #define MGA_CARD_TYPE_G400 2 #define MGA_CARD_TYPE_G450 3 /* not currently used */ #define MGA_CARD_TYPE_G550 4 #define MGA_FRONT 0x1 #define MGA_BACK 0x2 #define MGA_DEPTH 0x4 /* What needs to be changed for the current vertex dma buffer? */ #define MGA_UPLOAD_CONTEXT 0x1 #define MGA_UPLOAD_TEX0 0x2 #define MGA_UPLOAD_TEX1 0x4 #define MGA_UPLOAD_PIPE 0x8 #define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ #define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ #define MGA_UPLOAD_2D 0x40 #define MGA_WAIT_AGE 0x80 /* handled client-side */ #define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ #if 0 #define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock quiescent */ #endif /* 32 buffers of 64k each, total 2 meg. */ #define MGA_BUFFER_SIZE (1 << 16) #define MGA_NUM_BUFFERS 128 /* Keep these small for testing. */ #define MGA_NR_SAREA_CLIPRECTS 8 /* 2 heaps (1 for card, 1 for agp), each divided into upto 128 * regions, subject to a minimum region size of (1<<16) == 64k. * * Clients may subdivide regions internally, but when sharing between * clients, the region size is the minimum granularity. */ #define MGA_CARD_HEAP 0 #define MGA_AGP_HEAP 1 #define MGA_NR_TEX_HEAPS 2 #define MGA_NR_TEX_REGIONS 16 #define MGA_LOG_MIN_TEX_REGION_SIZE 16 #define DRM_MGA_IDLE_RETRY 2048 #endif /* __MGA_SAREA_DEFINES__ */ /* Setup registers for 3D context */ typedef struct { unsigned int dstorg; unsigned int maccess; unsigned int plnwt; unsigned int dwgctl; unsigned int alphactrl; unsigned int fogcolor; unsigned int wflag; unsigned int tdualstage0; unsigned int tdualstage1; unsigned int fcol; unsigned int stencil; unsigned int stencilctl; } drm_mga_context_regs_t; /* Setup registers for 2D, X server */ typedef struct { unsigned int pitch; } drm_mga_server_regs_t; /* Setup registers for each texture unit */ typedef struct { unsigned int texctl; unsigned int texctl2; unsigned int texfilter; unsigned int texbordercol; unsigned int texorg; unsigned int texwidth; unsigned int texheight; unsigned int texorg1; unsigned int texorg2; unsigned int texorg3; unsigned int texorg4; } drm_mga_texture_regs_t; /* General aging mechanism */ typedef struct { unsigned int head; /* Position of head pointer */ unsigned int wrap; /* Primary DMA wrap count */ } drm_mga_age_t; typedef struct _drm_mga_sarea { /* The channel for communication of state information to the kernel * on firing a vertex dma buffer. */ drm_mga_context_regs_t context_state; drm_mga_server_regs_t server_state; drm_mga_texture_regs_t tex_state[2]; unsigned int warp_pipe; unsigned int dirty; unsigned int vertsize; /* The current cliprects, or a subset thereof. */ struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS]; unsigned int nbox; /* Information about the most recently used 3d drawable. The * client fills in the req_* fields, the server fills in the * exported_ fields and puts the cliprects into boxes, above. * * The client clears the exported_drawable field before * clobbering the boxes data. */ unsigned int req_drawable; /* the X drawable id */ unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ unsigned int exported_drawable; unsigned int exported_index; unsigned int exported_stamp; unsigned int exported_buffers; unsigned int exported_nfront; unsigned int exported_nback; int exported_back_x, exported_front_x, exported_w; int exported_back_y, exported_front_y, exported_h; struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS]; /* Counters for aging textures and for client-side throttling. */ unsigned int status[4]; unsigned int last_wrap; drm_mga_age_t last_frame; unsigned int last_enqueue; /* last time a buffer was enqueued */ unsigned int last_dispatch; /* age of the most recently dispatched buffer */ unsigned int last_quiescent; /* */ /* LRU lists for texture memory in agp space and on the card. */ struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1]; unsigned int texAge[MGA_NR_TEX_HEAPS]; /* Mechanism to validate card state. */ int ctxOwner; } drm_mga_sarea_t; /* MGA specific ioctls * The device specific ioctl range is 0x40 to 0x79. */ #define DRM_MGA_INIT 0x00 #define DRM_MGA_FLUSH 0x01 #define DRM_MGA_RESET 0x02 #define DRM_MGA_SWAP 0x03 #define DRM_MGA_CLEAR 0x04 #define DRM_MGA_VERTEX 0x05 #define DRM_MGA_INDICES 0x06 #define DRM_MGA_ILOAD 0x07 #define DRM_MGA_BLIT 0x08 #define DRM_MGA_GETPARAM 0x09 /* 3.2: * ioctls for operating on fences. */ #define DRM_MGA_SET_FENCE 0x0a #define DRM_MGA_WAIT_FENCE 0x0b #define DRM_MGA_DMA_BOOTSTRAP 0x0c #define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) #define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, drm_lock_t) #define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET) #define DRM_IOCTL_MGA_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MGA_SWAP) #define DRM_IOCTL_MGA_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t) #define DRM_IOCTL_MGA_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t) #define DRM_IOCTL_MGA_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t) #define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t) #define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t) #define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t) #define DRM_IOCTL_MGA_SET_FENCE DRM_IOW( DRM_COMMAND_BASMultimedia-chat-meeting-2018-05-09 <geertu> kbingham: Wake up! <uli___> kbingham[m]: ^ <geertu> MultiMedia is in (cryogenic?) stasis... [17:20] <neg> Maybe he is on some odd none EU timezone ;-) In the meantime shall we do status reports individually in name order (jmondi, kbingham, morimoto, neg, uli___ )? <jmondi> neg: fine with me [17:21] <jmondi> even if I guess, the important part is collecting it, more than re-writing here what we reported by email <jmondi> I can start though <jmondi> - DRM bridge format support [PATCH 0/8] drm: bridge: Add support for static image formats HAve to really look into comments, unfortunately seems like we opened pandora's box of bridges lifetime management. [17:22] <jmondi> - MT9T111 media: i2c: mt9t112: Add OF tree support[3~ <jmondi> - Gen-3 VIN parallel support on D3 [17:23] <jmondi> capture now sort-of-wroking on v4.16 -> v4.17 has severe issues with memory corruption while capturing <jmondi> Until next time) <jmondi> - Complete VIN parallel support (due date 5/M) [17:24] <jmondi> - Re-tackle the bridges issues <jmondi> - Have MT9T111 capture working on peach, so I can integrate it on Armadillo <jmondi> - soc_camera removal <jmondi> Problems I have now) <jmondi> - Capturing on v4.17 is very fragile <jmondi> --eot-- <neg> soc_camera removal \o/ [17:25] <jmondi> neg: slow down, it's the third time in a row that it gets post-poned to "until next time" [17:26] <jmondi> is very low priority <neg> morimoto: do you have status update for MM? [17:28] <morimoto> OK <morimoto> A) What have I done since last time <marex-cloud> geertu: not bootargs to your scripts, but mtdparts to your bootargs, which you are clearly passing already ... btw we can continue the discussion in #perimtd if you want ( dammsan too ) <morimoto> IRQ <morimoto> OK, continue [17:29] <morimoto> - Enjoyed GW ! <morimoto> - DMAC driver error handling fixup <morimoto> # Current DMAC driver is sharing error IRQ for all channels, <morimoto> # but, it will be issue if we uses Virtual Machine, Multi OS, etc. <morimoto> # We can handle it on each channel's IRQ handler <morimoto> - Considering new PeriPeri tool (= periupport + peripelist = "periject") <morimoto> - Posted ALSA SoC cleanup patches final step <morimoto> B) What I plan to do till next time <morimoto> - Consider periject design <morimoto> C) Problems I have currently <morimoto> - I want to know each member's opinion about periject. <morimoto> but on-email is very OK <morimoto> -- EOF -- <shimoda> sorry, i have to go home. bye! [17:30] *** shimoda (~shimoda@relprex3.renesas.com) has quit: Quit: WeeChat 0.4.2 <morimoto> any question ? <morimoto> if no, next is neg <neg> So far I like the name periject :-) <neg> thanks <neg> rcar_csi2_write(priv, PHYCNT_REG, PHYCNT_RSTZ); <neg> rcar_csi2_write(priv, PHTC_REG, PHTC_TESTCLR); [17:31] <neg> wops <neg> A) <neg> - Posted and got merged second batch of VIN enhancement patches. <neg> - VIN M3-N done. <neg> - Rework CSI-2 based on datasheet v1.0, new patches pending. <neg> - Investigated ADV748x behavior of AFE pixel clock. <neg> B) <neg> - More CSI-2 work <neg> - Post next batch of VIN patches that piled up prior to Gen3 merger. [17:32] <neg> - Post fix for ADV748x <neg> - Post prototype for v4l2-subdev video standard control <neg> C) * geertu joined #perimtd <neg> - CSI-2 rework will maybe make it too late for v4.18 :-( <neg> -- eot -- <neg> if no questions please go a head uli___ [17:33] <uli___> A) <uli___> MM: wikified the instructions for running the IGT test suite <uli___> (https://elinux.org/R-Car/Tests:igt) <uli___> MM: rebasing IGT DU fixes, WIP <uli___> MM: adding DU support to D3, WIP <uli___> B) [17:34] <uli___> MM: finish DU on D3 <uli___> MM: send a new IGT DU fix series <uli___> C) <uli___> none <uli___> correction: C) copy-and-paste doesn't work very well in xfce terminal <uli___> that's it [17:35] <neg> thanks, out of curiosity is there any DU work for M3-N in the pipeline? <uli___> not from me [17:36] <jmondi> neg: I think Kieran was about to work on that <neg> jmondi: ok thanks I'm just curious [17:37] <neg> anything else we need to discuss for MM, I had counted on kbingham to handle this so I have nothng prepared but have not read all status mails in detail if there where any open questions <morimoto> I have nothing [17:39] <jmondi> neg: I only have the issues with v4.17 capture not working <uli___> none here <geertu> neg: [PATCH v2 00/11] r8a77965: M3-N DU Enablement <jmondi> but actually v4.16 behaves the same, I'm finding out as we speak <neg> geertu: thanks how could I miss that, I need a beter interface to gmane archive I keep missing patches [17:40] <uli___> jmondi: how exactly does it not work? [17:41] <jmondi> uli___: by 'randomly' hangs the CPU while capture operations is starting [17:42] <jmondi> uli___: yesterday Niklas suggested that power cyclcing the board would help as it may be some v4.17 memory corruption issue [17:43] <kbingham> ?? <kbingham> Have I just walked into a meeting that I didn't know was happening ? <jmondi> uli___: and it actually did, this morning I re-based on v4.16, first boot was ok, but now I still need to power cycle to have capture working <neg> jmondi: have you nailed it down to know if s_stream() have been called or if it's the set_fmt() that is the last v4l2 callback? [17:44] <morimoto> kbingham: meeting is almost ending stage now :) <kbingham> morimoto: Oh my ... I'm sorry ! I thought meetings were thursdays! <jmondi> neg: with strace I see g_fmt being called and that's it <neg> kbingham: :-) <jmondi> but I would not trust strace too much to debug these kind of issues <morimoto> kbingham: :) [17:45] <neg> jmondi: i think some trace printouts in rcar-vin/rcar-dma.c would be usefull to know if it's s_stream() or something else cousing the lockup [17:46] <jmondi> neg: you see, it is freaking 'random'.. I've been capturing images for a good 2 hours, rebooted the board, no kernel updates, now it hangs <kbingham> neg: M3-N DU should be in renesas-drivers already. [17:47] <jmondi> neg: I was not correct, I changed the pixel clock polarity between 2 reboots, I hardly think that can hang the CPU [17:48] <neg> jmondi: ouch that is bad, I had the impression it always failed on the second capture attempt by bad <jmondi> btw, let's tak it offline, I have nothing else for the meeting <jmondi> neg: no, I made several captures in a row, until I have rebooted the board [17:49] <neg> Yes lets keep talking about that later to not hold everyone up :-) <kbingham> So Shall I post my ABC ... and then that covers the status' :D <neg> kbingham: please do so if you have it handy :-) [17:50] <kbingham> Thursday 10th May <kbingham> <kbingham> A) What I have done since last time <kbingham> - M3-N DU Enablement <kbingham> - Got JTAG working with OpenOCD and Salvator-XS <kbingham> - TLB-Opimise v7,8,9 <kbingham> - DU/Interlaced v3, v4 <kbingham> B) What I will do next <kbingham> - DMA Virtualisation <kbingham> C) Any issues I have currently <kbingham> - None <kbingham> Ahem ... ignore the first line ... [17:51] <kbingham> I'll post that to the ML as a late addition <neg> thanks, I think the last item on the agenda is to pick who will record the MM log into the format pinchartl usually do and make sure it's sent out and recorded in the wiki and what else normaly happens with it [17:52] <kbingham> neg: I think that was supposed to be me - but I'm not certain I have all the scrollback ... [17:53] *** horms (~horms@a80-127-179-77.adsl.xs4all.nl) has quit: Ping timeout: 264 seconds <morimoto> neg: I can put it to wiki [17:54] <morimoto> kbingham: can you create it by using wiki ? <kbingham> morimoto: Sure :) <neg> kbingham: I can email you the full scrollback if you need it [17:55] <kbingham> neg: morimoto: - An e-mail is probably easier thanks
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