projects/linux/mm/done/bsp41x_validate-max-vga-dot-clock.yaml


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title: Validate max VGA dot clock
team: MM
key: 2f0026f2-80ea-11eb-8800-00e04c68641b
status: Abandoned

relationships:

bsp41x:
 - fccc46cf75fd45b867c8c8501c526a92efc4d49b # arm64: dts: r8a77995-draak: Set max dot clock for vga
 - 64ee34a191cefc9fd10042f785996c811c336992 # arm64: dts: r8a77990-ebisu: Set max dot clock for vga
 - a117af5977b652da0abece0b1a17049db4a76d09 # arm64: dts: salvator-common: Set max dot clock for vga
 - ae5ed0b2888c3c084849e3b1b77001c4b3519f5d # drm/bridge: dumb-vga-dac: Add dot clock valid check

upstream:

comments:
  - These patches are not suitable for upstream in their current form

    The maximum dot clock frequency isn't a property of the VGA connector,
    rather, it is a property of the DU and/or the LVDS encoders. It seems
    most appropriate to make it a property of the DU in which case it
    should not be specified in DT, but rather be included in the driver in
    the crtc .mode_valid() operation.

    Furthermore, the values in the BSP seem quite low and it is suggested
    that they are validated against the hardware limits derived from the DU.
    And as discuss the results of the investigation with the BSP team
    as necessary.

  - Above text is copied from bsp392_validate-max-vga-dot-clock.yaml task

  - Above patches moved to bsp-41x-non-target.yaml