blob: 6e39b5a18ba4b472beeb58e322529e07e2239207 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
|
title: "BSP 4.1.x upport: r8a779xx-ulcb: Fix source clock for DU"
team: MM
key: 194edb13-53ca-436d-aa57-7b56a38c2b68
status: Abandoned
assignee: Laurent
bsp41x:
- ac9c016b8ed5d22c76d1caa389a2ce9895ddbbd3 # arm64: dts: r8a77965-m3nulcb: Fix source clock for DU
- dcd9de3348cb79719c79eef6f7eb98b86ec5a8dc # arm64: dts: r8a7796-m3ulcb: Fix souce clock for DU
- 0dd514568ab43a3dbb12d6841190062f459f0705 # arm64: dts: r8a7795-h3ulcb: Fix souce clock for DU
- 95d2ee008fb96ac8def7471a4870a16f8bbf2f32 # arm64: dts: r8a7795-h3ulcb: Fix source clock for DU2
comments:
- These commits are workarounds, as stated in the commit messages. If the
issue is still present, it should be addressed in the clk-versaclock5
driver. More information is needed about what is broken.
|