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title: S4; enable IO devices for r8a779f0
team: IO
key: 96783090-d6a7-11ec-857c-172fbeb15dc7
assignee: Wolfram
status: Active
upstream:
- next: 525b296185b4b0abab0d35a7143fc5a99c385230 # dt-bindings: timer: renesas,cmt: Add r8a779f0 and generic Gen4 CMT support
- next: bd0ed737d5fda2ec55f915ed2c4f586363f71129 # dt-bindings: timer: renesas,cmt: R-Car V3U is R-Car Gen4
- next: aa84506ea644d0952a75136dee7386cc54b234b0 # clocksource/drivers/sh_cmt: Add R-Car Gen4 support
- lore: 20220713101447.3804-2-wsa+renesas@sang-engineering.com # [PATCH 1/3] clk: renesas: r8a779f0: Add CMT clocks
- lore: 20220713101447.3804-3-wsa+renesas@sang-engineering.com # [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add CMT support
- next: 080bcd8d5997b1a615e17cab02bd9d16d1d4fbf3 # [PATCH v2] clk: renesas: r8a779f0: Add HSCIF clocks
- next: 599fc76a5a00a3351caf06f96fc8a7e1bf67d9ea # [PATCH] dt-bindings: serial: renesas,hscif: Document r8a779f0 bindings
- next: 01a787f78bfd156d61b1844155f1dc4910e446c0 # [PATCH v2] arm64: dts: renesas: r8a779f0: Add HSCIF nodes
- next: c62872a6893ffdc38890b00d98d6bab2fce81d2f # [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3
- next: 40753144256b63b4e3fb9d80874605dda16ad713 # [PATCH v2] arm64: dts: renesas: r8a779f0: Add SCIF nodes
- next: 1614c8624a48b9c9161b2071e9e727bf5a1817ef # arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector
- next: aeb0965fb9f3dc767c953625f4427016902a2741 # mmc: renesas_sdhi: add R-Car Gen4 fallback compatibility string
- next: 53c6fc29fcaab0c24a48c7cc0f0e48df558719c8 # dt-bindings: mmc: renesas,sdhi: Document R-Car S4-8 and generic Gen4 support
- next: 75fe45a000a70ea35e2071eb7f8b873648590982 # [PATCH] clk: renesas: r8a779f0: Add SDHI0 clock
- next: f541b792424ae52f3023f1050301e22558712c43 # [PATCH] dt-bindings: mmc: renesas,sdhi: R-Car V3U is R-Car Gen4
- next: 2c02c2451f76e65bb9edf9fb2e7b056219b9d9d4 # [PATCH] dt-bindings: mmc: renesas,sdhi: Add R-Car Gen4 clock requirements
- lore: 20220711134656.277730-2-wsa+renesas@sang-engineering.com # [PATCH 1/3] clk: renesas: r8a779f0: Add sdh0 clock
- lore: 20220711134656.277730-3-wsa+renesas@sang-engineering.com # [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add SDHI0 support
- lore: 20220711134656.277730-4-wsa+renesas@sang-engineering.com # [PATCH 3/3] arm64: dts: renesas: spider-cpu: enable eMMC0
- next: 78516a12d7428176015997f655b4990112563ad3 # dt-bindings: thermal: rcar-gen3-thermal: use positive logic
- next: 4768f717d85c67c5158331c6b6bc661994462948 # dt-bindings: thermal: rcar-gen3-thermal: Add r8a779f0 support
- next: 61a6737fcad8810258bdf1329f063b58ac27b230 # clk: renesas: r8a779f0: Add thermal clock
- next: 5b2ca9bc3f1bb1a65e8a2c636047ea51aaa924b1 # thermal: rcar_gen3_thermal: Add r8a779f0 support
- next: 3be4812d6594b2844c305521056c118cdba9dac1 # thermal: rcar_gen3_thermal: improve logging during probe
- next: 5a3ad6f466fe7a187cbf4889d80a48606181c367 # arm64: dts: renesas: r8a779f0: Add thermal support
- lore: 20220726205858.1199-1-wsa+renesas@sang-engineering.com # [PATCH] dt-bindings: timer: renesas,tmu: Add r8a779f0 support
- lore: 20220726210110.1444-2-wsa+renesas@sang-engineering.com # [PATCH 1/3] clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks
- lore: 20220726210110.1444-3-wsa+renesas@sang-engineering.com # [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add TMU nodes
comments:
- CMT0/1
- prototype patches exist, clocksouce-switch test fails for CMT3, needs investigation
- the issue with clearing CMCNT happens on V3U as well, Gen3 seems not affected
- moving the issue to a seperate task
- enablement patches sent out
- HSCIF
- HSCIF 0+1 can be muxed to FTDI chips, HSCIF3 to MSIOF headers using an external FTDI, HSCIF2 maybe via unpopulated I2C header
- all HSCIFs could be tested, patches sent
- patch to switch from SCIF3 to HSCIF0 was dropped because it won't work with all firmware revisions
- all other patches merged
- done
- MSIOF
- RPC
- not for upstream because RPC shall only be accessed via OPTEE. See BSP commit 1f83a133b853138fad712d0a08a7689aac1e0183 ("Disable SPI flash via RPC")
- done
- SCIF
- SCIF 0+3 can be muxed to FTDI chips, SCIF1 to MSIOF headers using an external FTDI, SCIF4 maybe via unpopulated I2C header
- all SCIFs could be tested, patches sent
- patches merged
- done
- SD/MMC
- eMMC enabled and works, microSD enabled but still needs testing
- first patches sent, only final DTS addition kept until testing is done
- SD0H support was missing, resend needed
- eMMC works but is too slow compared to BSP, investigation needed
- microSD fails the same way the BSP does
- Shimoda-san researched that this is because SW6 needs to select the proper voltage
- SW is under the heat sink, though. So, for upstream only eMMC is desired
- resend patches to enable eMMC only
- slower speed than BSP moved to separate task
- slower speed was because of wrong kernel config, upstream kernel is actually faster
- THS/CIVM
- first version sent
- patch to improve logging needed more versions but we now came to a conclusion
- binding documentation needed more versions to handle the differences between all SoCs
- all patches merged
- done
- TMU
- probably possible; pinmux to TCLK1-4 and check via non-populated I2C header on breakout board
- enablement patches sent out
- all other devices are in the control domain which we do not handle. Only the application domain is our job.
- for a domain overview, check '001_R-CarS4_Bus Architecture_Rev0p70.pptx' (attachment in the S4 docs)
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