diff options
Diffstat (limited to 'wiki/GMSL_Cameras_Open_Issues_and_testing.wiki')
| -rw-r--r-- | wiki/GMSL_Cameras_Open_Issues_and_testing.wiki | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/wiki/GMSL_Cameras_Open_Issues_and_testing.wiki b/wiki/GMSL_Cameras_Open_Issues_and_testing.wiki index d884072..ad17ec7 100644 --- a/wiki/GMSL_Cameras_Open_Issues_and_testing.wiki +++ b/wiki/GMSL_Cameras_Open_Issues_and_testing.wiki @@ -23,7 +23,8 @@ Play around with KVAL, PVAL and DIFF periods Anticipating that the manual does not provide any information on what time constraints have to be respected to have a successful KVAL + PVAL hit (Figure 46, above reported), play around with configuration parameters. DIFF can be disabled (to confirm what does it mean) -*patch* +h3. patch + http://jmondi.org/owncloud/index.php/s/RG0rq870YEHOtAy 3) @@ -33,7 +34,8 @@ Try to have VSYNC follow the master link, not slowest one 4) Try to use i2c broadcast address To start all cameras at the same time -*patch* +h3. patch + http://jmondi.org/owncloud/index.php/s/Fj56fNUWsFPlhBi h2. Horizontal and vertical sync configuration @@ -96,7 +98,7 @@ Register used to monitor MAX9286 operations | Master VSYNC period | 0x5d 0x5c 0x5b | D7:D0 | Calculated VSYNC period of master link in PCLK cycles | | FSYNC Locked | 0x31 | D6 | Frame sync locked | -*Testing* +h3. Testing Printout of values while waiting for FSYNC locking. Configuration: @@ -120,7 +122,8 @@ Configuration: [ 48.861158] master vsync per - 2d 07 50 </pre> -*Patch* +h3. Patch + http://jmondi.org/owncloud/index.php/s/OLz8Ah7ZZH6X1t0 h2. Frame combination isn't fully understood |