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diff --git a/wiki/Chat_log/20181108-io-chatlog b/wiki/Chat_log/20181108-io-chatlog new file mode 100644 index 0000000..41e5c91 --- /dev/null +++ b/wiki/Chat_log/20181108-io-chatlog @@ -0,0 +1,150 @@ +09:02 < wsa> again, welcome everyone. IO meeting time now +09:02 < wsa> status updates: +09:02 < wsa> Status updates +09:02 < wsa> ============== +09:02 < wsa> A - what have I done since last time +09:02 < wsa> ------------------------------------ +09:02 < wsa> Kaneko-san +09:02 < wsa> : upported I2C, SCIF, HSICF enablement for E3 +09:02 < wsa> Marek +09:02 < wsa> : upported SCIF2 pinmux patches, SDHI patches for E3 and submitted V2 for +09:02 < wsa> the PCIe L1 ATF workaround +09:02 < wsa> Niklas +09:02 < wsa> : (did various SDHI patches to enable HS400 but missed to send in his report) +09:02 < wsa> Shimoda-san +09:02 < wsa> : fixed remove function of SCIF driver and investigated an issue for USB3.0 +09:02 < wsa> peripheral with E3 +09:02 < wsa> Ulrich +09:02 < wsa> : reviewed two SCIF patches +09:02 < wsa> Wolfram +09:02 < wsa> : organied and participted in SDHI hackfest, imported periupport priorities to +09:02 < wsa> latest ticket file, picked up TDSEL and WDT patches again, reviewed lots of +09:02 < wsa> SDHI patches and some general PM rework, updated periupport, and started to +09:02 < wsa> pick up I2C core PM rework again +09:02 < wsa> B - what I want to do until next time +09:02 < wsa> ------------------------------------- +09:02 < wsa> Geert +09:02 < wsa> : wants to resubmit fixes for fallback to PIO in the sh-sci driver +09:02 < wsa> Kaneko-san +09:02 < wsa> : wants to upport HSCIF, PWM, and PCIE for E3 +09:02 < wsa> Marek +09:02 < wsa> : wants to continue on PCI, DVFS I2C and PMIC upporting for E3 and PCA953x +09:02 < wsa> suspend/resume support +09:02 < wsa> Shimoda-san +09:02 < wsa> : wants to fix the USB3.0 issue for E3 and investigate a USB related reset +09:02 < wsa> issue for Gen2 +09:02 < wsa> Simon +09:02 < wsa> : wants to investigate RAVB no-link patches in BSP 3.7.2 +09:02 < wsa> Ulrich +09:02 < wsa> : wants to continue reviewing patches +09:02 < wsa> Wolfram +09:02 < wsa> : wants to continue I2C core PM rework and upport BSP patches +09:02 < Marex> wsa: clock +09:03 < wsa> C - problems I currently have +09:03 < wsa> ----------------------------- +09:03 < wsa> Shimoda-san: +09:03 < wsa> asks for documentation introducing to virtualization +09:03 < wsa> Simon: +09:03 < wsa> has D3 thermal support tested but patches stuck on upstream mailing list +09:03 < wsa> my questions: +09:04 < wsa> horms: I assume the IIC issue with ICSTART are resolved now? +09:04 < wsa> horms: any plan when you can start working on the RAVB no-link patches? +09:05 < wsa> Marex: did you coordinate your E3 upporting work with someone? I mean it is great to see progress there, but there is work assigned to Kaneko-san already and I'd like to avoid duplication of work... +09:06 < Marex> wsa: I checked with geertu, he said it was OK +09:06 < Marex> wsa: I was concerned about Kaneko-san, yes +09:07 < Marex> wsa: is the PCI/I2C/PMIC task assigned ? +09:08 < wsa> Marex: Good, thanks! I will check with geertu then how to handle this in the future... +09:08 < wsa> PCIE and IIC is, PMIC not +09:08 < geertu> Marex: i2c was not mentioned in last's IO meeting report, PMIC was for core +09:09 < wsa> It probably makes sense to combine IIC and PMIC +09:09 < wsa> to you +09:09 < geertu> I've been running with iic and pmic enabled on e3 +09:09 < wsa> It is a grey area, I think, because PFC is core and I2C itself is IO +09:09 < geertu> iic works +09:10 < geertu> pmic is blocked by Ebisu firmware not supporting s2ram on the 4D variant yet +09:10 < geertu> Else I would have had submitted it myself the week I got the board. +09:10 < wsa> so, not much harm done (I think), but a sign to install some communication between geert and me here +09:12 < wsa> I also think it would make sense to assign PCIE to Marex but we also need work for Kaneko-san +09:12 < wsa> I will check this when I update the lists after the meeting +09:12 < wsa> horms: is this all OK with you? +09:12 < Marex> wsa: OK +09:12 < geertu> Can Kaneko-san test his work on some board now? +09:12 < geertu> Apparently his last PFC patch was not even compile-tested +09:12 < Marex> wsa: I tested the PCIe on Ebisu 4D already +09:13 < Marex> wsa: so I can roll out the patch right away +09:13 < wsa> neg: you there? +09:13 < wsa> Marex: heh +09:15 < wsa> I also wonder about Jinso sending thermal patches... +09:16 < wsa> why exactly this driver? :) +09:16 < wsa> damm: do you know about this? +09:16 < damm> nope sorry +09:17 < wsa> pity neg seems not here, too +09:17 < wsa> neither he sent a report, I hope he is well +09:17 < Marex> wsa: probably on his way to Canada ? +09:17 < Marex> wsa: so anyway, I'll wait with the PCIe patches ? +09:18 < geertu> He said his mail and git trees will be cut off for a week by its hosting provider, perhaps that has already started, and caused more damage than expected? +09:18 < wsa> Marex: yes, but probably just until this evening +09:18 < wsa> just until I updated all my lists +09:18 < Marex> wsa: got it, will do +09:19 < wsa> Marex: thanks +09:20 < wsa> so, the updated periupport list with imported priorities... +09:20 < wsa> morimoto: are you okay with this (in general)? +09:20 < wsa> geertu: did you have a chance to look at it? +09:20 * morimoto talking with our Boss now +09:21 < wsa> I would be nice to merge it rather soonish, I'd think. pinchartl and my updates are already depending on it... +09:22 < wsa> pinchartl: thanks for the prompt review! +09:22 < geertu> wsa: I only had a brief look. +09:23 < wsa> Marex: did the HS400 clock fix from this night also fix the HS400 issue in Linux then? +09:23 < geertu> I did do some auto-updates and fixed obsolete linux-next references +09:23 < wsa> geertu: before or after the conversion? +09:24 < Marex> wsa: no, I'm still seeing that and I'm not sure why +09:24 < Marex> wsa: I have a hypothesis, but I need to test it +09:24 < geertu> wsa: on master +09:25 < wsa> Marex: which hypothesis? +09:25 < morimoto> wsa: basically I have no objection (= for periupport) +09:25 < Marex> wsa: that it has to do somehow with the board physical properties, possibly temperature +09:25 < wsa> Marex: there are HS400 related patches in the latest BSP dealing with temperature +09:26 < Marex> wsa: I have very little samples to support the hypothesis, but the HS400 worked in Linux if I cold started the board after some idle period +09:26 < Marex> wsa: on the next reboot or power cycle, it failed +09:26 < Marex> wsa: even if I waited a bit to discharge the caps +09:27 < Marex> thus, I suspect temperature, but like I said, I have very little samples to support this +09:27 < Marex> I need to test more +09:27 < wsa> +09:27 < wsa> Since Gen3 SDHI has a internal DS signal AC-spec violation in HS400 mode, +09:27 < wsa> CRC-error may occur in read command. It is only HS400 mode. +09:27 < wsa> This phoenomenon occurs at low/High temperature. +09:27 * wsa wonders about Marex room temperature ;) +09:29 < wsa> geertu: do you want to have time for another look at the periupport changes? +09:30 < Marex> wsa: I saw that patch +09:30 < Marex> wsa: I rather wonder if this has to do with the CPU heating up the board, or itself +09:30 < wsa> Marex: sure, was j/k +09:30 < geertu> wsa: I'll have a closer look +09:31 < geertu> (using the pre-commit hook or make patch ;-) +09:31 < Marex> wsa: I suspect that violation is also present on older Gen3s and that results in the 4TAP 400MHz SDnH limitation ? +09:31 < wsa> geertu: ok, let me know what you think by mail then. Thanks! +09:32 < Marex> wsa: but then I wonder if on 4tap SoCs, the performance in the HS400 mode is worse than on 8tap SoC ... +09:33 < wsa> Marex: my gut feeling is there is some bigger thing going wrong, but it's all speculation +09:33 < wsa> and not terribly important why exactly there are 4 taps +09:33 < Marex> wsa: the thing is, when I configured the clock correctly for the 8tap/HS400, the raw read performance almost doubled ... +09:34 < Marex> wsa: so I wonder if on 4tap SoCs, the read performance in HS400 would be lower than on 8tap SoC +09:34 < wsa> Marex: I expect the 4tap performance to be worse than 8tap +09:34 < wsa> but as long as it is > HS200... +09:35 < Marex> wsa: it was exactly equal for me +09:35 < Marex> wsa: but I need to revisit the 4tap case +09:35 < wsa> AFAICS there is not much we can do, and the focus should be the latest ES version anyhow +09:36 < wsa> neg did a chart +09:36 < Marex> wsa: right, the scratchpad +09:36 < geertu> Who has access to H3 ES3.0? +09:37 < Marex> geertu: I had it in my hands once +09:37 < wsa> neg had a slight increase on H3 ES2.0. that matches my experiences +09:37 * wsa notes to update the chart with his results +09:38 < wsa> okay, are there questions from your side +09:38 < wsa> ? +09:39 < wsa> sadly, no responses from horms about questions to him. Simon, if you read this later, please respond by mail to periperi +09:39 < Marex> wsa: on H3, I had 170MB/s in both HS200 and HS400, so no increase for me :( +09:40 < Marex> wsa: but I suspect 200 MB/s might be the limit for 4tap configs +09:40 < wsa> let's update the table and continue the discussion by mail, too +09:40 < Marex> wsa: sounds good +09:40 < wsa> Marex: thanks! +09:41 < wsa> let's get to the core now :) +09:41 < wsa> geertu: have fun! |