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authorGeert Uytterhoeven <geert+renesas@glider.be>2021-07-12 17:11:33 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-07-13 10:08:50 +0200
commit6c88c02ee9f38b4b46335a62136eb3b0931c3a68 (patch)
tree0dc6a4403fd64be35357d9d95234d7283b0b17ae /wiki/H3_ULCB/H3_ULCB-2016-08-25.tar.bz2
parent043e412597c8fec166bce0ee6c595f74462f7496 (diff)
projects: linux: core: Mark "CLK; Implement .determine_rate() callback" Done
All Renesas clock drivers have been converted from .round_rate() to .determine_rate(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
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