wiki: Porting wiki: Porting Chat Log

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

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+09:04 < wsa_> welcome to the io meeting!
+09:04 < wsa_> Here are the collected status updates:
+09:04 < wsa_> A - what have I done since last time
+09:04 < wsa_> ------------------------------------
+09:04 < wsa_> Geert
+09:04 < wsa_> : fixed SYNCAC handling for MSIOF
+09:04 < wsa_> Kaneko-san
+09:04 < wsa_> : got M3-N SDHI support merged
+09:04 < wsa_> Marek
+09:04 < wsa_> : worked on upporting PCIE, removed mtdparts from DT
+09:04 < wsa_> Niklas
+09:04 < wsa_> : had a high-priority-interrupt to finally get his VIN patches upstream, so no time for IO
+09:04 < wsa_> Shimoda-san
+09:04 < wsa_> : investigated usb1.1 host suspend/resume issue, submitted new role switch patchset, and upported E3 ethernet support
+09:04 < wsa_> Simon
+09:04 < wsa_> : got positive response about his SDHI HS400 patches
+09:04 < wsa_> Ulrich
+09:04 < wsa_> : enabled MSIOF, HSCIF, SCIF and successfully tested thermal on D3
+09:04 < wsa_> Wolfram
+09:04 < wsa_> : discussed internally BSP patches and/or regressions about I2C and SDHI, tested periject, started SPDX conversion for drivers written by Renesas, and some patch review/resending
+09:04 < wsa_> B - what I want to do until next time
+09:04 < wsa_> -------------------------------------
+09:04 < wsa_> Geert
+09:04 < wsa_> : wants to look into the DMA completion issue for MSIOF
+09:04 < wsa_> Kaneko-san
+09:04 < wsa_> : wants to upport PCIE support for M3-W and M3-N
+09:04 < wsa_> Marek
+09:04 < wsa_> : wants to work on PCIE suspend/resume
+09:04 < wsa_> Niklas
+09:04 < wsa_> : wants to resume SDHI work
+09:04 < wsa_> Shimoda-san
+09:04 < wsa_> : wants to continue with the suspend/resume issue and the role switch driver, add USB2 support for E3 including GPIO support for the PHY
+09:04 < wsa_> Simon
+09:04 < wsa_> : wants to keep working on HS400 including M3-N support and CPG changes
+09:04 < wsa_> Wolfram
+09:04 < wsa_> : wants to continue with SDHI upporting, SPDX conversion, and QEMU I2C passthrough
+09:04 < wsa_> C - problems I currently have
+09:04 < wsa_> -----------------------------
+09:04 < wsa_> Wolfram
+09:04 < wsa_> : now needs some commited base time from Niklas. And a discussion with the Core group how to handle the 32bit DMA limitation of PCIE.
+09:04 < wsa_> Niklas
+09:04 < wsa_> : still missing HW fuses to test the thermal driver
+09:05 < wsa_> feel free to comment if I missed something
+09:05 < wsa_> otherwise about the C) items
+09:06 < wsa_> neg needs HW fuses for thermal. Is there any internal plan where those should/could be added?
+09:06 < wsa_> Or can we just keep waiting until they appear?
+09:07 < wsa_> This is a question for JapaPeri :)
+09:07 < neg> There are patches in the BSP so there must be hardware somewhere :-P
+09:07 < wsa_> About neg's base time: After VIN is over, I'd like to give SDHI upporting some priority.
+09:08 < dammsan> and i would like some world peace =)
+09:08 < wsa_> This is a question for pinchartl. How are M/M priorities for him these days?
+09:08 < wsa_> dammsan: this is your first wish?
+09:08 < wsa_> :D
+09:09 < pinchartl> wsa_: for Niklas ?
+09:09 < dammsan> yes of course
+09:10 < wsa_> and about the PCIE 32bit topic. I think we need to move it to core, and from there decide how to proceed.
+09:10 < wsa_> geertu: do you agree?
+09:10 < wsa_> pinchartl: yes
+09:10 < pinchartl> wsa_: there was a budget of 5 days of additional tasks for Q2/2 that we couldn't use as no small task enough I proposed was deemed good enough by Renesas
+09:10 < pinchartl> but I suspect you may want more than 5 days :-)
+09:10 < Marex> wsa_: I am fine either way
+09:10 < geertu> wsa_: OK
+09:11 < Marex> wsa_: btw I discovered another bug in the PCIe driver dragged in by Sergei's PHY addition, fixing it now
+09:11 < wsa_> Marex: nice
+09:12 < wsa_> pinchartl: dunno if we can do it as additional task. AFAIU all our base time was increased to upport. And this is a upport task.
+09:12 < wsa_> dammsan: what do you think?
+09:12 < neg> My view is that with the VIN lump of lard behind me I will have more time for IO, not sure if pinchartl have something lined up. From a status of pending patches I feel I'm in a better position today then last meeting
+09:13 < wsa_> neg: congrats again for getting "rid" of the VIN stuff, that's for sure!
+09:13 < pinchartl> neg: for the rest of Q2, I'd like you to keep track of all pending VIN patches to make sure they all get merged
+09:13 < dammsan> wsa_: lets use base time as much as possible
+09:13 < pinchartl> which involves reposting patches that were delayed due to VIN/CSI-2 being out-of-tree
+09:14 < pinchartl> apart from that, I'd like to continue GMSL development, but I think that can wait for Q3
+09:14 < wsa_> sounds good to me
+09:15 < wsa_> neg: you fine with that, too?
+09:17 < neg> wsa_: I'm not sure what the conclusion is :-) For Q2 I will sheperone delayed patches and focus on SDHI. While in Q3 GMSL might be back to drag me back more to MM? If so I'm fine with it
+09:17 < wsa_> that's at least my understanding, too
+09:17 < wsa_> pinchartl: d'accord?
+09:18 < pinchartl> that's my understanding too :-)
+09:18 < pinchartl> if that's fine with you
+09:18 < wsa_> \o/
+09:18 < wsa_> perfect, thank you!
+09:19 < wsa_> Then, I have a question about E3 upporting/enablement
+09:19 < wsa_> Who has HW to test?
+09:19 < wsa_> https://osdr.renesas.com/projects/linux-kernel-development/wiki/Hardware is empty on that one
+09:19 < geertu> wsa_: Shimoda-san only?
+09:19 < wsa_> (BTW I sorted this page a little more)
+09:20 < wsa_> I see
+09:20 < shimoda_cloud> yes, i have a board only. i'll get more boards later (early July?)
+09:21 < Marex> wsa_: I want to lend the board while Im in Japan so I can try U-Boot on it :)
+09:21 < wsa_> ah, that's good to know
+09:21 < wsa_> so, only trivial binding updates for now
+09:21 < Marex> shimoda_cloud: would that work for you for a few days ? I'll arrive on the 13th in the morning
+09:23 < wsa_> ok, I will contact some of you individually, too, for discussing upporting details
+09:23 < wsa_> other than that, I have nore more topics
+09:24 < shimoda_cloud> Marex: that work means U-Boot? I think I (or Magnus-san) can bring the board for you for a few days
+09:24 < wsa_> Is there something from your side?
+09:24 < dammsan> shimoda_cloud: my plan is to disconnect the E3 board from remote access when Marex arrives
+09:24 < Marex> shimoda_cloud: jupp :)
+09:25 < Marex> shimoda_cloud: I have the U-Boot patchset kinda ready, so I'll just need to iron out the details on that board
+09:25 < shimoda_cloud> dammsan: Marex: I got it :)
+09:25 < wsa_> If not, we could switch to core with the added topic of 32bit DMA 
+09:25 < Marex> shimoda_cloud: I hope for no big surprises, but we'll see
+09:26 < geertu> dammsan: You mean the E3 is in your farm? And perhaps available?
+09:26 < dammsan> geertu: will be next week
+09:26 < geertu> wsa_: SDHI write protect
+09:26 < geertu> Is this a regression? SDHI was refactored recently.
+09:26 < shimoda_cloud> Marex: I also hope so
+09:27 < wsa_> geertu: yes, it is. I am still puzzled because I am sure I tested Yamada-sans patches on Gen3 and Lager.
+09:27 < wsa_> and my fixup of that
+09:28 < Marex> shimoda_cloud: speaking of which, do you or renesas have a few spare JTAG adapters from Tokyo Eletech for ULCBs ? :)
+09:28 < Marex> shimoda_cloud: or can they be bought somewhere in tokyo on the market ?
+09:28 < geertu> Marex: "somewhere" == "Akihabara"?
+09:29 < shimoda_cloud> Marex: I'll ask goda-san about the adapter
+09:29 < Marex> shimoda_cloud: that'd be real nice, but no stress, it's just my curiosity :-)
+09:29 < Marex> shimoda_cloud: thank you!
+09:30 < wsa_> so, geertu, takeover?
+09:31 < geertu> wsa_: OK, thank you!
+09:31 < wsa_> have fun. and thanks all for this meeting