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authorGeert Uytterhoeven <geert+renesas@glider.be>2021-05-03 10:23:11 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-05-11 11:00:13 +0200
commitced162f1ad7bb6c122803fa871e099b9a5b2585e (patch)
treea305c675d9c3638a27072a196de308740eec0599 /projects/linux
parent1e14f24f7a8fa5b4d88f5120c145d498459c7c5c (diff)
linux: bsp-41x: non-target: Move RMSTPCR() register offset fix
The Realtime Module Stop Control Register offsets are unused, and planned to be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Diffstat (limited to 'projects/linux')
-rw-r--r--projects/linux/bsp-41x-non-target.yaml1
-rw-r--r--projects/linux/core/bsp41x_clk_renesas.yaml1
2 files changed, 1 insertions, 1 deletions
diff --git a/projects/linux/bsp-41x-non-target.yaml b/projects/linux/bsp-41x-non-target.yaml
index 55d9199..ce3556d 100644
--- a/projects/linux/bsp-41x-non-target.yaml
+++ b/projects/linux/bsp-41x-non-target.yaml
@@ -488,3 +488,4 @@ bsp41x:
- a94771bfac9edcf8b7ca3f4e5f1abe10d2f5b5b4 # clk: renesas: r8a7795: Replace PLL3 multiplication setting (Proposing 'N': DDR2400/2800 not documented in Hardware User's Manual)
- 03c680e8979f58ea0c0a256f749634a83cf5ddfb # clk: renesas: r8a77965: Replace PLL3 multiplication setting (Proposing 'N': DDR2400/2800 not documented in Hardware User's Manual)
- 7129bd9f34f06cbca6221e9809ab522bf71e6abd # clk: renesas: r8a7796: Replace PLL3 multiplication setting (Proposing 'N': DDR2400/2800 not documented in Hardware User's Manual)
+ - e2e29b30e3175bdb72d275fea28e1443e8301074 # clk: renesas: cpg-mssr: Fix Realtime Module Stop Control Register offsets (Proposing 'N': Incorrect definitions are unused, and planned to be removed)
diff --git a/projects/linux/core/bsp41x_clk_renesas.yaml b/projects/linux/core/bsp41x_clk_renesas.yaml
index ebf79c5..736ef56 100644
--- a/projects/linux/core/bsp41x_clk_renesas.yaml
+++ b/projects/linux/core/bsp41x_clk_renesas.yaml
@@ -7,7 +7,6 @@ bsp41x:
- 226e92814ca5b8ea1ce789869cee131c9bc2a819 # clk: renesas: rcar-gen3: Add support ZG clock divider for R8A77990
- 97a8cbaabb27ab9b53c345798e87ff5de155cf94 # clk: renesas: rcar-gen3: Fix revision of R8A7796 for applying SD_SKIP_FIRST
- 5a2c795936b78619f1f83ff89846efe7e63be2b3 # clk: renesas: rcar-gen3: Fix SCCG/Clean peripheral clocks definition
- - e2e29b30e3175bdb72d275fea28e1443e8301074 # clk: renesas: cpg-mssr: Fix Realtime Module Stop Control Register offsets
- 630d6bce408c5955192de1053053572ccc66103c # clk: r8a779x: add IMP clock
- de03f48327ebdb3c0bb30b4866e27ff158655cc6 # clk: r8a779x: add mlp clock
- 8dc96a9c37919b41fbf48747a00cf003f0d00091 # clk: renesas: r8a7795: Add ADG clock