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| author | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2021-03-22 02:32:29 +0200 |
|---|---|---|
| committer | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2021-03-31 13:43:21 +0300 |
| commit | a408aaef0709c40f4daa53a18c0e1a2386e02df7 (patch) | |
| tree | 8e3056894a38c4a8e0e745f70e7c6f065709c880 /projects/linux/mm/done | |
| parent | 54f5bd29ec86aee45994611cee69c10c7ddb3972 (diff) | |
linux: mm: Move max VGA dot clock validation from Abandoned to New
The ADV7123 VGA DAC has an upper pixel clock frequency limit. It may not
match the values set in the device tree in relevant BSP commits, but it
still has to be taken into account.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Diffstat (limited to 'projects/linux/mm/done')
| -rw-r--r-- | projects/linux/mm/done/bsp41x_validate-max-vga-dot-clock.yaml | 32 |
1 files changed, 0 insertions, 32 deletions
diff --git a/projects/linux/mm/done/bsp41x_validate-max-vga-dot-clock.yaml b/projects/linux/mm/done/bsp41x_validate-max-vga-dot-clock.yaml deleted file mode 100644 index 00bc5f8..0000000 --- a/projects/linux/mm/done/bsp41x_validate-max-vga-dot-clock.yaml +++ /dev/null @@ -1,32 +0,0 @@ -title: Validate max VGA dot clock -team: MM -key: 2f0026f2-80ea-11eb-8800-00e04c68641b -status: Abandoned - -relationships: - -bsp41x: - - fccc46cf75fd45b867c8c8501c526a92efc4d49b # arm64: dts: r8a77995-draak: Set max dot clock for vga - - 64ee34a191cefc9fd10042f785996c811c336992 # arm64: dts: r8a77990-ebisu: Set max dot clock for vga - - a117af5977b652da0abece0b1a17049db4a76d09 # arm64: dts: salvator-common: Set max dot clock for vga - - ae5ed0b2888c3c084849e3b1b77001c4b3519f5d # drm/bridge: dumb-vga-dac: Add dot clock valid check - -upstream: - -comments: - - These patches are not suitable for upstream in their current form - - The maximum dot clock frequency isn't a property of the VGA connector, - rather, it is a property of the DU and/or the LVDS encoders. It seems - most appropriate to make it a property of the DU in which case it - should not be specified in DT, but rather be included in the driver in - the crtc .mode_valid() operation. - - Furthermore, the values in the BSP seem quite low and it is suggested - that they are validated against the hardware limits derived from the DU. - And as discuss the results of the investigation with the BSP team - as necessary. - - - Above text is copied from bsp392_validate-max-vga-dot-clock.yaml task - - - Above patches moved to bsp-41x-non-target.yaml |