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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-09 14:44:14 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-09 16:15:44 +0100 |
| commit | fec98d214a23a6c1f3e31e80bb7fd74342a0d188 (patch) | |
| tree | 806c4b4aeb8837386629fdb062c274f86d046d49 /projects/linux/mm/bsp41x_simple-bridge-Validate-pixel-clock.yaml | |
| parent | c5ad1a2574f7b15637b60c222076def6f4381e04 (diff) | |
bsp-51x-upport-request: Move identical requests to tasks (part 1)
Several upport requests for bsp-51x existed in bsp-41x with the same
patch ID, and were broken out in tasks before.
Move them to the existing tasks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'projects/linux/mm/bsp41x_simple-bridge-Validate-pixel-clock.yaml')
| -rw-r--r-- | projects/linux/mm/bsp41x_simple-bridge-Validate-pixel-clock.yaml | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/projects/linux/mm/bsp41x_simple-bridge-Validate-pixel-clock.yaml b/projects/linux/mm/bsp41x_simple-bridge-Validate-pixel-clock.yaml index 845c390..81eea24 100644 --- a/projects/linux/mm/bsp41x_simple-bridge-Validate-pixel-clock.yaml +++ b/projects/linux/mm/bsp41x_simple-bridge-Validate-pixel-clock.yaml @@ -9,6 +9,11 @@ bsp41x: - 64ee34a191cefc9fd10042f785996c811c336992 # arm64: dts: r8a77990-ebisu: Set max dot clock for vga - a117af5977b652da0abece0b1a17049db4a76d09 # arm64: dts: salvator-common: Set max dot clock for vga +bsp51x: + - b4f1a56ac6c04bdf7ea93c3007c4806e45b6ff2e # arm64: dts: renesas: r8a77995-draak: Set max dot clock for vga + - 9d841a4ca98457458d9e1dd204da855a678490e0 # arm64: dts: renesas: r8a77990-ebisu: Set max dot clock for vga + - d30ef0c32c45035f86639621cc55a9d425cfdebf # arm64: dts: renesas: salvator-common: Set max dot clock for vga + comments: - The ADV7123 VGA DAC used on the Draak, Ebisu and Salvator-X boards has a pixel clock rate limit of 140MHz. The simple-bridge driver should implement |