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| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2019-06-06 10:54:43 +0200 |
|---|---|---|
| committer | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2019-06-06 10:54:43 +0200 |
| commit | 7832e6e40bf800daeb58c61b582ccbd8205ec39b (patch) | |
| tree | ccdf487314fad1937614a29ecc5dcb3f4c3480b5 /projects/linux/io/bsp395_SDHI.yaml | |
| parent | 605e6d690bca471cf52b61df45dba4e9fdb12f0d (diff) | |
projects: linux: io: update tasks after meeting 20190606
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Diffstat (limited to 'projects/linux/io/bsp395_SDHI.yaml')
| -rw-r--r-- | projects/linux/io/bsp395_SDHI.yaml | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/projects/linux/io/bsp395_SDHI.yaml b/projects/linux/io/bsp395_SDHI.yaml index a4e29f1..8dc5162 100644 --- a/projects/linux/io/bsp395_SDHI.yaml +++ b/projects/linux/io/bsp395_SDHI.yaml @@ -12,7 +12,9 @@ bsp-commits: - a0d396ede95a55a4dff6aa15ea314a3d35e2e842 # mmc: renesas_sdhi: Disable sampling clock position correction in HS400 mode upstream: + - next: 51b72656bb39fdcb8f3174f4007bcc83ad1d275f # mmc: tmio: fix SCC error handling to avoid false positive CRC error comments: - "76e319805df86f370d140b4b556a550145b5a251: https://patchwork.kernel.org/patch/10945051/" + - "76e319805df86f370d140b4b556a550145b5a251: merged" - "a0d396ede95a55a4dff6aa15ea314a3d35e2e842: we need more confirmation from HW team which SoCs are affected" |