diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-03-11 09:54:29 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-03-11 09:55:29 +0100 |
| commit | 84bfd2d17cd88eda9101e09bf7576f232865ee2a (patch) | |
| tree | a2cea27b204a064d77a23a2180fd626870752f2b /projects/linux/core | |
| parent | 05355bad18ee87dd704a52737b6980c19d0c508f (diff) | |
projects: linux: core: clk: Update non-target for INTC-{AP,EX}
Cfr. comments for bsp392_clk_renesas_intc_clock_removal.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'projects/linux/core')
| -rw-r--r-- | projects/linux/core/bsp41x_clk_renesas.yaml | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/projects/linux/core/bsp41x_clk_renesas.yaml b/projects/linux/core/bsp41x_clk_renesas.yaml index c5afa1d..4411cc5 100644 --- a/projects/linux/core/bsp41x_clk_renesas.yaml +++ b/projects/linux/core/bsp41x_clk_renesas.yaml @@ -12,7 +12,6 @@ bsp41x: - e2e29b30e3175bdb72d275fea28e1443e8301074 # clk: renesas: cpg-mssr: Fix Realtime Module Stop Control Register offsets - 630d6bce408c5955192de1053053572ccc66103c # clk: r8a779x: add IMP clock - de03f48327ebdb3c0bb30b4866e27ff158655cc6 # clk: r8a779x: add mlp clock - - 46fb258928ffef41dc12c818baa4dba083bcb119 # clk: renesas: r8a77{95,965,990}: Remove INTC-AP and INTC-EX clocks - 8dc96a9c37919b41fbf48747a00cf003f0d00091 # clk: renesas: r8a7795: Add ADG clock - 545a5ee67acb14b335f667068569edf568701f14 # clk: renesas: r8a7795: Add AVS clock - b1dbacf27857e697fc45a32853a0731150151b6c # clk: renesas: r8a7795: Add iVDP1C clocks to ES1.x @@ -28,7 +27,6 @@ bsp41x: - 64558129af10ee7d149538fc7ecffb4029800d0e # clk: renesas: r8a7796: Add iVDP1C clock - c19b595e501379b8465559afe1f974c3ec8c64d6 # clk: renesas: r8a7796: Add VCP4 clocks - d6ec7401d973ca94d05ada3f536ea90a51ab49c7 # clk: renesas: r8a7796: Add ZG clock - - 94748de35b7c5df994c8d5d98e0d727bd247fbe7 # clk: renesas: r8a7796: Remove INTC-AP and INTC-EX clocks - b95564845d3a41210863fc3528290cc2929e0062 # clk: renesas: r8a7796: Remove iVDP1C and FCPCI0 clocks on ES3.0 - 7129bd9f34f06cbca6221e9809ab522bf71e6abd # clk: renesas: r8a7796: Replace PLL3 multiplication setting - cba445d7f22ba68ca439b51fb0dddc5c7374e73a # clk: renesas: r8a77970: cpg-mssr: Add IMP clocks |