diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-12-10 09:29:41 +0100 |
---|---|---|
committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-12-10 09:40:57 +0100 |
commit | 2b91cf69328b06559b563e6e8ac508e05e9af3c1 (patch) | |
tree | 03c25abefb6b6dfa428c68a755024e4415bbe773 /projects/linux/core | |
parent | 43717ae31ee76dab029cc6ba0aa07e6cd7688a55 (diff) |
Auto-update sweep for v5.5-rc1
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'projects/linux/core')
6 files changed, 13 insertions, 13 deletions
diff --git a/projects/linux/core/bsp392_arm64_dts_renesas_cpuidle.yaml b/projects/linux/core/bsp392_arm64_dts_renesas_cpuidle.yaml index b9ccfe5..6723344 100644 --- a/projects/linux/core/bsp392_arm64_dts_renesas_cpuidle.yaml +++ b/projects/linux/core/bsp392_arm64_dts_renesas_cpuidle.yaml @@ -12,10 +12,10 @@ bsp-commits: - b96175039caa666ce08b4c4845cc621bb5a30db7 # arm64: dts: r8a77990: Add CPUIdle support for CA53 upstream: - - next: a3ba116909e38ab525445b5262ee70c588469816 # arm64: dts: r8a7795: Add cpuidle support for CA57 cores - - next: fe87bde8deff35ddc288ba4099830c61fdcfabf8 # arm64: dts: r8a7795: Add cpuidle support for CA53 cores - - next: 824a88b5671fc88ef5dd0bf6861f7497b3db0d28 # arm64: dts: r8a7796: Add cpuidle support for CA57 cores - - next: 3cbcfececc364d83ce48ec88519eb526d5a6d3d0 # arm64: dts: r8a7796: Add cpuidle support for CA53 cores + - torvalds: a3ba116909e38ab525445b5262ee70c588469816 # arm64: dts: r8a7795: Add cpuidle support for CA57 cores + - torvalds: fe87bde8deff35ddc288ba4099830c61fdcfabf8 # arm64: dts: r8a7795: Add cpuidle support for CA53 cores + - torvalds: 824a88b5671fc88ef5dd0bf6861f7497b3db0d28 # arm64: dts: r8a7796: Add cpuidle support for CA57 cores + - torvalds: 3cbcfececc364d83ce48ec88519eb526d5a6d3d0 # arm64: dts: r8a7796: Add cpuidle support for CA53 cores comments: - "c635f6a8ad201445fb1125a4d8c045d4de704c35: requested upport with c4eaa8e627a321ff73bd9791f51020871e48d7ce of BSPv3.6.0" diff --git a/projects/linux/core/bsp396_arm64_dts_renesas_add_iommus_into_sdhi.yaml b/projects/linux/core/bsp396_arm64_dts_renesas_add_iommus_into_sdhi.yaml index f406fb6..6809cf0 100644 --- a/projects/linux/core/bsp396_arm64_dts_renesas_add_iommus_into_sdhi.yaml +++ b/projects/linux/core/bsp396_arm64_dts_renesas_add_iommus_into_sdhi.yaml @@ -10,6 +10,6 @@ bsp-commits: - 1f12f0466c7782ef7f44481ecf08db5e77448c7f # arm64: dts: r8a77990-ebisu{,-es10}: Enable IPMMU of SDHI3 upstream: - - next: 8292f5eb3874844d41d87d1c8e415592d27e8e20 # arm64: dts: renesas: Add iommus to R-Car Gen3 SDHI/MMC nodes + - torvalds: 8292f5eb3874844d41d87d1c8e415592d27e8e20 # arm64: dts: renesas: Add iommus to R-Car Gen3 SDHI/MMC nodes comments: diff --git a/projects/linux/core/bsp396_clk_renesas_r8a77961.yaml b/projects/linux/core/bsp396_clk_renesas_r8a77961.yaml index cc7aaec..a7815d1 100644 --- a/projects/linux/core/bsp396_clk_renesas_r8a77961.yaml +++ b/projects/linux/core/bsp396_clk_renesas_r8a77961.yaml @@ -9,7 +9,7 @@ bsp-commits: - 59fcadc987f6bac8f70e330294c6df6dce156c0b # clk: renesas: r8a7796: Remove iVDP1C and FCPCI0 clocks on ES3.0 upstream: - - next: 2ba738d56db4ddb1c17e418cb501d303a8b481d2 # clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support + - torvalds: 2ba738d56db4ddb1c17e418cb501d303a8b481d2 # clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support comments: - Upstream doesn't manage iVDP1C for now. diff --git a/projects/linux/core/bsp396_pinctrl_sh-pfc_r8a77990.yaml b/projects/linux/core/bsp396_pinctrl_sh-pfc_r8a77990.yaml index d5ebca1..75cfe8e 100644 --- a/projects/linux/core/bsp396_pinctrl_sh-pfc_r8a77990.yaml +++ b/projects/linux/core/bsp396_pinctrl_sh-pfc_r8a77990.yaml @@ -12,8 +12,8 @@ bsp-commits: - a8795e6614fba81131423e000f8048ddff7f8b0f # Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2" upstream: - - next: 05f841d2a92380d98cc2a3cc162bf068f154b2f1 # pinctrl: sh-pfc: r8a77990: Rename AVB_AVTP_{MATCH,CAPTURE} pin functions - - next: 7666dfd533d4c55733037775d47a8e3551b341a2 # Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D" 11129977diffmboxseries - - next: 3672bc7093434621c83299ef27ea3b3225a67600 # Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2" + - torvalds: 05f841d2a92380d98cc2a3cc162bf068f154b2f1 # pinctrl: sh-pfc: r8a77990: Rename AVB_AVTP_{MATCH,CAPTURE} pin functions + - torvalds: 7666dfd533d4c55733037775d47a8e3551b341a2 # Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D" 11129977diffmboxseries + - torvalds: 3672bc7093434621c83299ef27ea3b3225a67600 # Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2" comments: diff --git a/projects/linux/core/bsp396_sysc_r8a77961.yaml b/projects/linux/core/bsp396_sysc_r8a77961.yaml index a7a7cb8..e9bff30 100644 --- a/projects/linux/core/bsp396_sysc_r8a77961.yaml +++ b/projects/linux/core/bsp396_sysc_r8a77961.yaml @@ -9,6 +9,6 @@ bsp-commits: - 0c91cbef047c56167d60f6638053ed298813483f # soc: renesas: r8a7796-sysc: Nullify A2VC0 on M3 Ver.3.0 upstream: - - next: bdde3d3ec934839b3c11689ead467099f1c36c12 # soc: renesas: rcar-sysc: Add R8A77961 support + - torvalds: bdde3d3ec934839b3c11689ead467099f1c36c12 # soc: renesas: rcar-sysc: Add R8A77961 support comments: diff --git a/projects/linux/core/clk_renesas_determine_rate.yaml b/projects/linux/core/clk_renesas_determine_rate.yaml index d4b40d1..962e1a7 100644 --- a/projects/linux/core/clk_renesas_determine_rate.yaml +++ b/projects/linux/core/clk_renesas_determine_rate.yaml @@ -7,9 +7,9 @@ status: Active relationships: upstream: - - next: 7aee839ed27d813a3adcf9da3a19b60b6581f867 # clk: renesas: rcar-gen2: Switch Z clock to .determine_rate() - - next: df98719f033cf5903febf036ffdeb5b0f77a0fda # clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate() - - next: 362c79f75c9ff129935d30279812a0d9c63eb76b # clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate() + - torvalds: 7aee839ed27d813a3adcf9da3a19b60b6581f867 # clk: renesas: rcar-gen2: Switch Z clock to .determine_rate() + - torvalds: df98719f033cf5903febf036ffdeb5b0f77a0fda # clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate() + - torvalds: 362c79f75c9ff129935d30279812a0d9c63eb76b # clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate() comments: - cpg_div6_clock_round_rate() still to be converted |