diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-09 16:02:49 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-09 16:15:49 +0100 |
| commit | f5240568501c8e9aa57ca02c55fb0552def5c15d (patch) | |
| tree | 9bdea379ac3cd867fb77dda4f87864418087063a /projects/linux/core/bsp41x_clk_renesas.yaml | |
| parent | fec98d214a23a6c1f3e31e80bb7fd74342a0d188 (diff) | |
bsp-51x-upport-request: Move identical requests to tasks (part 2)
Several upport requests for bsp-51x existed in bsp-41x with the same
patch summary, and were broken out in tasks before.
Move them to the existing tasks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'projects/linux/core/bsp41x_clk_renesas.yaml')
| -rw-r--r-- | projects/linux/core/bsp41x_clk_renesas.yaml | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/projects/linux/core/bsp41x_clk_renesas.yaml b/projects/linux/core/bsp41x_clk_renesas.yaml index d8e9208..176bc13 100644 --- a/projects/linux/core/bsp41x_clk_renesas.yaml +++ b/projects/linux/core/bsp41x_clk_renesas.yaml @@ -45,7 +45,14 @@ bsp41x: - 60151ad45b0ded0aacab6438fbf03631b0f1c14f # clk: renesas: r8a779a0: Add WWDT clocks bsp51x: + - 5582d6cdb469f1b4bbab91166e0bff096ee4f610 # clk: renesas: rcar-gen3: Add support ZG clock divider for R8A77990 - ce47cc590b66d6aa4e2333daff4eb680a594be31 # clk: renesas: rcar-gen3: Fix revision of R8A7796 for applying SD_SKIP_FIRST + - 282015509bbfc49836a2af6c3ba07242c6684310 # clk: renesas: r8a7795: Add ADG clock + - f1cd1c62af62c115d3de129c6012f34152ded002 # clk: renesas: r8a7795: Add iVDP1C clocks to ES1.x + - 369b8ac0bfe67c64eb5a5a2f1ce10304cf95da70 # clk: renesas: r8a7795: Add VCP4 clock + - 16e4543e163e2d127a98e542950de6c3ed29acc6 # clk: renesas: r8a7796: Add iVDP1C clock + - 10ebbc065ddd9749f591017a3250c203819e6fb1 # clk: renesas: r8a77990: Add FDP1 clock + - a297ad0ce10681616317e7e20933cecdd46b21de # clk: renesas: r8a779a0: Extend number of supported module clocks upstream: - torvalds: 2bd9feed23166f5ab67dec2ca02bd3f74c77b0ba # clk: renesas: r8a779[56]x: Add MLP clocks |