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authorGeert Uytterhoeven <geert+renesas@glider.be>2019-03-22 11:40:27 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2019-03-22 13:37:09 +0100
commit8ac8e1d2333f0bb8dd4bc9a4908c889826c072aa (patch)
treee37fb59ef42f4efd143860e85d2513800399dfc0 /projects/linux/core/bsp392_clk_renesas_r8a7796.yaml
parent366ca8ec958d2ffb2f23671dcef7057027b07103 (diff)
projects: linux: core: Merge clock errata
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'projects/linux/core/bsp392_clk_renesas_r8a7796.yaml')
-rw-r--r--projects/linux/core/bsp392_clk_renesas_r8a7796.yaml2
1 files changed, 0 insertions, 2 deletions
diff --git a/projects/linux/core/bsp392_clk_renesas_r8a7796.yaml b/projects/linux/core/bsp392_clk_renesas_r8a7796.yaml
index 35361a7..0336483 100644
--- a/projects/linux/core/bsp392_clk_renesas_r8a7796.yaml
+++ b/projects/linux/core/bsp392_clk_renesas_r8a7796.yaml
@@ -6,9 +6,7 @@ status: New
relationships:
bsp-commits:
- - 1ad2ac2ebaee63e6df1489d145e9a17bc8dc32a0 # clk: renesas: r8a7796: Correct parent clock of EHCI/OHCI
- aa06410b1a3b130a4b3c09b2de31e47f5f0c4752 # clk: renesas: r8a7796: Add division value of z and z2 clock
- - e6b2f32570db4c47730e2217f3aa602a370f5aa5 # clk: renesas: r8a7796: Correct parent clock of HS-USB
- eb2b15bdbc4670893b4e1b4c4faa3c94a6d75511 # clk: renesas: r8a7796: Remove INTC-AP and INTC-EX clocks
upstream: