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authorGeert Uytterhoeven <geert+renesas@glider.be>2022-03-02 17:34:23 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-03-04 09:31:00 +0100
commit1c2426c6bb61b174d8cb585ef29979005537d330 (patch)
tree50acaffa8bebdb5aa9acae6e858f5682896d515e
parent65ce9f2150882bdf475a37e59bf85986c064f484 (diff)
bsp-51x-upport-request: Move H3/M3 DDR2400/2800 to non-target
DDR2400/2800 is not documented in the Hardware User's Manual, cfr. the corresponding bsp-41x commits. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-rw-r--r--projects/linux/bsp-51x-non-target.yaml1
-rw-r--r--projects/linux/bsp-51x-upport-request.yaml1
2 files changed, 1 insertions, 1 deletions
diff --git a/projects/linux/bsp-51x-non-target.yaml b/projects/linux/bsp-51x-non-target.yaml
index 8156591..0fed372 100644
--- a/projects/linux/bsp-51x-non-target.yaml
+++ b/projects/linux/bsp-51x-non-target.yaml
@@ -449,3 +449,4 @@ bsp51x:
- 24c871e931a06c7eaf10f96d6222896ec6303d34 # arm64: dts: renesas: r8a779{51, 60, 61, 65, 90}: Use default clock and reset property for secure public core (Proposing 'N': DT describes hardware, not documentation policy)
- d328d6af340480402d35daee4e172395099d12b9 # arm64: dts: renesas: ulcb: Enable IPMMU of SDHI2 (not applicable)
- 6f3c53c98b55453dc5d7e2a24f4a956ca843af96 # clk: renesas: r8a779a0: Support RPC clock for R8A779A0 (torvalds: 27c9d7635d23416f5e791508882f34157dde23f5 # clk: renesas: r8a779a0: Add RPC support)
+ - d71920dcb3daeb3dd5c9959dd776c2fea695a794 # clk: renesas: r8a77{95, 96, 965}: Replace PLL3 multiplication setting ((Proposing 'N': DDR2400/2800 not documented in Hardware User's Manual))
diff --git a/projects/linux/bsp-51x-upport-request.yaml b/projects/linux/bsp-51x-upport-request.yaml
index c30a9e5..12a3574 100644
--- a/projects/linux/bsp-51x-upport-request.yaml
+++ b/projects/linux/bsp-51x-upport-request.yaml
@@ -166,7 +166,6 @@ bsp51x:
- 6ee241c75f9f29a2ade4649a3d3f1865206f31ad # clk: renesas: r8a779{70, 80}: Add POST clock
- d96e03675ebb130c6796203bf703678fc971be6b # clk: renesas: r8a77{95, 96, 965, 990, 980}: Add RT-DMAC clocks
- a27bdfbe3804f3b8b78894cf78766b3968ca0237 # clk: renesas: r8a77{95, 96, 965, 990}: Add ZG clock
- - d71920dcb3daeb3dd5c9959dd776c2fea695a794 # clk: renesas: r8a77{95, 96, 965}: Replace PLL3 multiplication setting
- e7bcd75b2ab34b3535d568eb5f8a6042413a0677 # clk: renesas: r8a77{96, 965, 990}: Add ADG clock
- e2002ddf1a8a2d3229cec9f0be1d398099ef2c83 # clk: renesas: r8a77{96, 965, 990}: Add ADSP clock
- df47d799536c8a1ef50b6219bdacce458c4d3a57 # clk: renesas: r8a77{96, 965, 990}: Add VCP4 clocks