summaryrefslogtreecommitdiff
path: root/shared/radeon_cp.c
AgeCommit message (Expand)Author
2003-12-16Don't ioremap the framebuffer area. The ioremapped area wasn't used byEric Anholt
2003-11-05- Tie the DRM to a specific device: setunique no longer succeeds when givenEric Anholt
2003-11-04Memory layout transition:Michel Daenzer
2003-10-17- Move IRQ functions from drm_dma.h to new drm_irq.h and disentangle themEric Anholt
2003-08-26Remove artificial PCI GART limitations, rename AGP to GART whereMichel Daenzer
2003-08-18Clean up Radeon DRI resume codeMichel Daenzer
2003-05-20DRM part of Radeon DRI suspend/resume support (Charl Botha).David Dawes
2003-05-16Support AGP bridges where the AGP aperture can't be accessed directly byMichel Daenzer
2003-05-06fix warning on machines where sizeof(drm_addr_t) != 4 (Randy Dunlap)Michel Daenzer
2003-04-26Ensure driver has been initialized (dev_private != NULL) before installingLeif Delgass
2003-04-22get rid of superfluous fields in struct drm_radeon_ring_bufferMichel Daenzer
2003-04-22Remove AGP dependency in kernel config for radeon, sis. RemoveLeif Delgass
2003-04-22add more get_param queries for embedded projectKeith Whitwell
2003-04-21Check for NULL map before calling DRM(ioremapfree) on cleanup. Prevents anLeif Delgass
2003-03-28merged drm-filp-0-1-branchKeith Whitwell
2003-03-25XFree86 4.3.0 mergeAlan Hourihane
2003-02-21Merge from bsd-4-0-0-branch.Eric Anholt
2003-01-16Fix radeon for BSD.Eric Anholt
2003-01-10Note that radeon_do_cp_idle() can fail, cope with it.Keith Whitwell
2003-01-03more cleanups, free mem heap data on last client exitKeith Whitwell
2003-01-02Remove printkKeith Whitwell
2003-01-02Make the radeon drm module better at cleaning up after itself if all theKeith Whitwell
2002-11-25Silence the radeon_freelist_get 'returning NULL' message. It's not an errorKeith Whitwell
2002-09-29Turn boxes off againKeith Whitwell
2002-09-29Move os-dependent stuff out of radeon_irq.cKeith Whitwell
2002-09-23merged r200-0-2-branch to trunkKeith Whitwell
2002-08-29standardize use of __FUNCTION__ (Linus)Keith Whitwell
2002-08-28Turn boxes off.Keith Whitwell
2002-08-26merged r200-0-1-branchKeith Whitwell
2002-08-21TRUE and FALSE don't seem to be defined everywhere...Michel Daenzer
2002-08-11test scratch register writeback before using itMichel Daenzer
2002-07-11Don't read scratch registers directly, obtain the values via the GET_PARAMMichel Daenzer
2002-07-05merged bsd-3-0-0-branchAlan Hourihane
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-13 01:22:25 +0000
an> nouveau_gpuobj_new_fake(dev, NV04_RAMFC(chan->id), ~0, NV04_RAMFC__SIZE, NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE, NULL, &chan->ramfc))) return ret; /* Setup initial state */ RAMFC_WR(DMA_PUT, chan->pushbuf_base); RAMFC_WR(DMA_GET, chan->pushbuf_base); RAMFC_WR(DMA_INSTANCE, chan->pushbuf->instance >> 4); RAMFC_WR(DMA_FETCH, (NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES | NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES | NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 | #ifdef __BIG_ENDIAN NV_PFIFO_CACHE1_BIG_ENDIAN | #endif 0)); /* enable the fifo dma operation */ NV_WRITE(NV04_PFIFO_MODE,NV_READ(NV04_PFIFO_MODE) | (1<<chan->id)); return 0; } void nv04_fifo_destroy_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<<chan->id)); nouveau_gpuobj_ref_del(dev, &chan->ramfc); } int nv04_fifo_load_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t tmp; NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id); NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET, RAMFC_RD(DMA_GET)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT, RAMFC_RD(DMA_PUT)); tmp = RAMFC_RD(DMA_INSTANCE); NV_WRITE(NV04_PFIFO_CACHE1_DMA_INSTANCE, tmp & 0xFFFF); NV_WRITE(NV04_PFIFO_CACHE1_DMA_DCOUNT, tmp >> 16); NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE, RAMFC_RD(DMA_STATE)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_FETCH, RAMFC_RD(DMA_FETCH)); NV_WRITE(NV04_PFIFO_CACHE1_ENGINE, RAMFC_RD(ENGINE)); NV_WRITE(NV04_PFIFO_CACHE1_PULL1, RAMFC_RD(PULL1_ENGINE)); /* Reset NV04_PFIFO_CACHE1_DMA_CTL_AT_INFO to INVALID */ tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_CTL) & ~(1<<31); NV_WRITE(NV04_PFIFO_CACHE1_DMA_CTL, tmp); return 0; } int nv04_fifo_save_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t tmp; RAMFC_WR(DMA_PUT, NV04_PFIFO_CACHE1_DMA_PUT); RAMFC_WR(DMA_GET, NV04_PFIFO_CACHE1_DMA_GET); tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_DCOUNT) << 16; tmp |= NV_READ(NV04_PFIFO_CACHE1_DMA_INSTANCE); RAMFC_WR(DMA_INSTANCE, tmp); RAMFC_WR(DMA_STATE, NV_READ(NV04_PFIFO_CACHE1_DMA_STATE)); RAMFC_WR(DMA_FETCH, NV_READ(NV04_PFIFO_CACHE1_DMA_FETCH)); RAMFC_WR(ENGINE, NV_READ(NV04_PFIFO_CACHE1_ENGINE)); RAMFC_WR(PULL1_ENGINE, NV_READ(NV04_PFIFO_CACHE1_PULL1)); return 0; }
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-13 01:22:24 +0000