| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-02-15 | nv50: context info for chipset 0xa0 | Ben Skeggs | |
| 2009-02-11 | drm/nv50: fix nv9x chipsets | Ben Skeggs | |
| NVIDIA do this fun little sequence after updating the PRAMIN page tables. On 9xxx chips, none of the PRAMIN BAR bindings (except the initial one) worked, hence the majority of the setup needed to create a channel ended up in the wrong place, causing all sorts of fun. This is done by NVIDIA on nv8x chips also, so we'll do it for them too, even though they appear to work without it. | |||
| 2009-02-11 | drm/nv50: add context info for nv98 | Ben Skeggs | |
| It won't work yet, just like the other 9xxx chips. Real soon now :) | |||
| 2009-02-10 | drm/nv50: use a slightly different initial context for nv96 | Ben Skeggs | |
| I'm not 100% sure that the nv94 one we were using won't work. The context layouts are identical (well.. same ctxprog, so of course!), only a couple of registers differ. But, be safe until we actually get some 9xxx chips working. | |||
| 2009-02-10 | drm/nv50: correct ramfc pointer in channel header | Ben Skeggs | |
| Suprisingly the card still worked without this... | |||
| 2009-02-10 | drm/nv50: let the card handle the initial context switch | Ben Skeggs | |
| Our PFIFO/PGRAPH context save/load functions don't really work well (at all?) on nv5x yet. Depending on what random state the card is in before the drm loads, fbcon probably won't work correctly. Luckily we've setup the GPU in such a way that it'll actually do a hw context switch for the first context. Not sure of how successful this'd be currently on the older chips (actually, pretty sure it won't work), so NV50 only for now. | |||
| 2009-02-07 | nouveau: don't try to traverse non-existent lists | Stuart Bennett | |
| Fixes nouveau_ioctl_mem_free Oops | |||
| 2009-02-04 | nouveau: bring in new mm api definitions, without the actual mm code | Ben Skeggs | |
| Use of the new bits is guarded with a mm_enabled=0 hardcode. | |||
| 2009-02-02 | Remove the "nv" driver. | Stephane Marchesin | |
| 2009-01-29 | nouveau: don't save channel context if it has recently become invalid | Stuart Bennett | |
| Bug exposed by DDX change d9da090c | |||
| 2009-01-29 | nouveau: no suspend support for nv50+ | Stuart Bennett | |
| 2009-01-27 | intel: libdrm support for fence management in execbuf | Jesse Barnes | |
| This patch tries to use the available fence count to figure out whether a given batch can succeed or not (just like the aperture check). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net> | |||
| 2009-01-27 | nv50: support chipset NV96 | Ben Skeggs | |
| ctxprog seen in okias' trace identical to one we use on NV94, assuming the initial context values for NV94 will work here too. | |||
| 2009-01-27 | nv04-nv40: correct RAMHT size | Ben Skeggs | |
| 2009-01-12 | nv50: ack nsource to prevent continuous protection fault irqs | Ben Skeggs | |
| 2008-12-23 | [FreeBSD] Fix build on FreeBSD after modesetting import. | Robert Noland | |
| 2008-12-23 | radeon: only write irq regs if irq is enabled | Dave Airlie | |
| 2008-12-22 | intel: Rename plane[AB]* back to pipe[AB]*. | Eric Anholt | |
| The values are really going to continue meaning pipe, not plane, and that's what they're called in the kernel copy of the header. Userland hasn't ever made the switch to pipe!=plane, since userland checks are based on DRM version, which is still stuck at 1.6. However, Mesa did start using plane[AB] names, so provide a compat define. | |||
| 2008-12-22 | intel: Sync GEM ioctl comments for easier diffing against the kernel. | Eric Anholt | |
| 2008-12-17 | libdrm: add mode setting files | Jesse Barnes | |
| Add mode setting files to libdrm, including xf86drmMode.* and the new drm_mode.h header. Also add a couple of tests to sanity check the kernel interfaces and update code to support them. | |||
| 2008-12-10 | Revert "Merge branch 'modesetting-gem'" | Jesse Barnes | |
| This reverts commit 6656db10551bbb8770dd945b6d81d5138521f208. We really just want the libdrm and ioctl bits, not all the driver stuff. | |||
| 2008-12-03 | Merge branch 'master' into modesetting-gem | Jesse Barnes | |
| 2008-11-23 | nv50: support NV94 chipset | Ben Skeggs | |
| 2008-11-21 | nv50: update context-related tables for original 8800GTS | Ben Skeggs | |
| I either messed up when I pulled these from a mmio-trace last time, or the previous values didn't work on my card. Hopefully it's the former! In any case, at least one of the original NV50 chipsets work now. | |||
| 2008-11-20 | DRM: make drm_map_type match upstream kernel | Jesse Barnes | |
| Since the TTM type isn't upstream yet, we need to make sure libdrm uses what the kernel uses, which is _DRM_GEM = 6. | |||
| 2008-11-20 | DRM: make drm_map_type match kernel | Jesse Barnes | |
| GEM is upstream, but TTM isn't, so _DRM_GEM needs to be 6, not 7. | |||
| 2008-11-19 | Unbreak drm build. | Stephane Marchesin | |
| 2008-11-19 | Merge branch 'modesetting-gem' of ssh://git.freedesktop.org/git/mesa/drm ↵ | Jesse Barnes | |
| into modesetting-gem | |||
| 2008-11-16 | radeon: protect cs ioctl atomic part with a mutex | Jerome Glisse | |
| A small subset of CS need to be atomic (relocation+IB commit to ring) right now, because of the way relocation are handled, we need to protect the whole ioctl. | |||
| 2008-11-13 | Merge branch 'master' into modesetting-gem | Jesse Barnes | |
| Conflicts: libdrm/Makefile.am libdrm/intel/intel_bufmgr.h libdrm/intel/intel_bufmgr_fake.c libdrm/intel/intel_bufmgr_gem.c shared-core/drm.h shared-core/i915_dma.c shared-core/i915_irq.c shared-core/radeon_cp.c shared-core/radeon_drv.h | |||
| 2008-11-13 | libdrm: add support for i915 GTT mapping ioctl | Jesse Barnes | |
| Add a drm_intel_gem_bo_map_gtt() function for mapping a buffer object through the aperture rather than directly to its CPU cacheable memory. | |||
| 2008-11-12 | mode: Minor reodering and renaming | Jakob Bornecrantz | |
| 2008-11-12 | mode: Reorder the ioctls and numbering | Jakob Bornecrantz | |
| This is to fill in the gaps left by the removal of the hotplug ioctls. And they also look better :) | |||
| 2008-11-12 | mode: Remove hotplug support from ioctl interface | Jakob Bornecrantz | |
| 2008-11-12 | mode: Unify types for ids and strings | Jakob Bornecrantz | |
| 2008-11-10 | radeon: add gart useable size to report to userspace | Dave Airlie | |
| 2008-11-10 | radeon: fix ring tail overflow issue since alignment | Dave Airlie | |
| 2008-11-10 | radeon: disable HDP read cache for now | Dave Airlie | |
| 2008-11-10 | radeon: force all ring writes to 16-dword alignment. | Dave Airlie | |
| 2008-11-09 | radeon: add more packet3 relocations handling | Jerome Glisse | |
| 2008-11-03 | radeon: make build again | Dave Airlie | |
| 2008-11-03 | radeon: add mtrr support for VRAM aperture. | Dave Airlie | |
| 2008-11-03 | radeon: disable AGP for certain chips if not specified until we figure it out | Dave Airlie | |
| 2008-11-03 | radeon: disable debugging message | Dave Airlie | |
| 2008-11-03 | radeon: commit ring after emitting the buffer discards | Dave Airlie | |
| 2008-11-03 | radeon: setup isync cntl properly | Dave Airlie | |
| 2008-11-03 | radeon: overhaul ring interactions | Dave Airlie | |
| emit in 16-dword blocks, emit irqs at same time as everything else | |||
| 2008-11-03 | radeon: add proc debugging for interrupts/ring | Dave Airlie | |
| 2008-11-03 | radeon: only enable dynclks if asked for | Dave Airlie | |
| 2008-11-03 | radeon: add wait rendering API | Dave Airlie | |
 |
index : renesas/drm.git | |
| libdrm, cloned from git://anongit.freedesktop.org/mesa/drm | Laurent Pinchart |
| summaryrefslogtreecommitdiff |
path: root/shared-core