diff options
| author | Ben Skeggs <skeggsb@gmail.com> | 2009-02-10 08:57:21 +1000 |
|---|---|---|
| committer | Ben Skeggs <skeggsb@gmail.com> | 2009-02-10 09:11:27 +1000 |
| commit | 889b811e319ab80a4714854a0c0b242b5e36e0ca (patch) | |
| tree | a3a805d5f5f4ec979b40856023adac54c97a959a /shared-core | |
| parent | 9c8d634e687a5a5b5d314b3fd5b34cc17a217139 (diff) | |
drm/nv50: let the card handle the initial context switch
Our PFIFO/PGRAPH context save/load functions don't really work well
(at all?) on nv5x yet. Depending on what random state the card is
in before the drm loads, fbcon probably won't work correctly.
Luckily we've setup the GPU in such a way that it'll actually do a
hw context switch for the first context. Not sure of how successful
this'd be currently on the older chips (actually, pretty sure it won't
work), so NV50 only for now.
Diffstat (limited to 'shared-core')
| -rw-r--r-- | shared-core/nouveau_fifo.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c index 92ea8fc2..114ed29b 100644 --- a/shared-core/nouveau_fifo.c +++ b/shared-core/nouveau_fifo.c @@ -362,7 +362,8 @@ nouveau_fifo_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret, /* If this is the first channel, setup PFIFO ourselves. For any * other case, the GPU will handle this when it switches contexts. */ - if (dev_priv->fifo_alloc_count == 1) { + if (dev_priv->card_type < NV_50 && + dev_priv->fifo_alloc_count == 1) { ret = engine->fifo.load_context(chan); if (ret) { nouveau_fifo_free(chan); |