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2007-07-11fixed bug that prevented PCIE cards from actually using PCIGART - NV50 will ↵Arthur Huillet
probably still have a problem
2007-07-11nouveau/nv50: G80 fixes.Ben Skeggs
Again, no hardware, so no idea if it'll even work yet. I understand how the PRAMIN setup works now, un-hardcoding stuff will come "RealSoonNow(tm)".
2007-07-11nouveau: Some checks on userspace object handles.Ben Skeggs
2007-07-11Merge branch 'master' into cleanupDave Airlie
Conflicts: libdrm/xf86drm.c linux-core/drm_bo.c linux-core/drm_fence.c
2007-07-11Added support for PCIGART for PCI(E) cards. Bumped DRM interface patchlevel.Arthur Huillet
2007-07-09Fix ioctl types.Ian Romanick
I had moved code from xgi_drv.h to xgi_drm.h before changing the ioctl types for XGI_IOCTL_(FB|PCIE)_ALLOC.
2007-07-09Move types shared with user mode to xgi_drm.h.Ian Romanick
2007-07-09nouveau: Allocate mappable VRAM for notifiers..Ben Skeggs
2007-07-09nouveau: Don't be so strict on <NV50Ben Skeggs
2007-07-09nouveau: Avoid oopsBen Skeggs
Turns out lastclose() gets called even if firstopen() has never been...
2007-07-09nouveau/nv50: Initial channel/object supportBen Skeggs
Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80.
2007-07-09nouveau: enable reporting for all PFIFO/PGRAPH irqsBen Skeggs
2007-07-09nouveau: rewrite gpu object codeBen Skeggs
Allows multiple references to a single object, needed to support PCI(E)GART scatter-gather DMA objects which would quickly fill PRAMIN if each channel had its own. Handle per-channel private instmem areas. This is needed to support NV50, but might be something we want to do on earlier chipsets at some point? Everything that touches PRAMIN is a GPU object.
2007-07-06radeon: Improve vblank counter.Michel Dänzer
The frame counter seems to increase only at the end of vertical blank, so we need to add 1 while in vertical blank.
2007-07-03One more spinlock initializer cleanup.Michel Dänzer
2007-06-29Move out the code from i915_dma_cleanup to unload to matchAlan Hourihane
existing code. This needs verifying.
2007-06-29Bring back code from merge that was accidentally removed.Alan Hourihane
2007-06-29merge fixesAlan Hourihane
2007-06-29Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into ↵Alan Hourihane
modesetting-101 Conflicts: linux-core/drm_drv.c linux-core/drm_fops.c linux-core/drm_objects.h linux-core/drm_stub.c shared-core/i915_dma.c
2007-06-29nouveau: small RAMFC cleanupsBen Skeggs
2007-06-28nouveau: Hack around possible Xv blit adaptor breakageBen Skeggs
2007-06-28nouveau/nv10: Fix earlier NV1x chipsBen Skeggs
Can't use nv04 code for them, since an extra field was inserted into RAMFC after DMA_PUT/GET.
2007-06-28nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bitBen Skeggs
2007-06-28nouveau: simplify PRAMIN accessBen Skeggs
2007-06-28nouveau: name some regsBen Skeggs
2007-06-28nouveau/nv50: skeletal backendBen Skeggs
2007-06-28nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7)Ben Skeggs
For various reasons, this ioctl was a bad idea. At channel creation we now automatically create DMA objects covering available VRAM and GART memory, where the client used to do this themselves. However, there is still a need to be able to create DMA objects pointing at specific areas of memory (ie. notifiers). Each channel is now allocated a small amount of memory from which a client can suballocate things (such as notifiers), and have a DMA object created which covers the suballocated area. The NOTIFIER_ALLOC ioctl exposes this functionality.
2007-06-28nouveau/nv04: Set NV_PFIFO_CACHE1_PUSH1 correctly + small tweaksBen Skeggs
2007-06-26More 64-bit padding.Thomas Hellstrom
2007-06-26Add support SiS based XGI chips to SiS DRM.Ian Romanick
2007-06-25nouveau: NV49/NV4B PGRAPH setup from jb17bsome and stephan_2303Ben Skeggs
2007-06-24nouveau: kill some dead codeBen Skeggs
2007-06-24nouveau: NV04/NV10/NV20 PGRAPH engtab functionsBen Skeggs
NV04/NV10 load_context()/save_context() are stubs. I don't know enough about how they work to implement them sanely. The "old" context_switch() code remains hooked up, so it shouldn't break anything. NV20 will probably break if load_context() works. No inital context values are filled in, so when the first channel is created PGRAPH will probably end up having its state zeroed. Some setup from nv20_graph_init() will probably need to be moved to the per-channel context setup.
2007-06-24nouveau: NV3X PGRAPH engtab functionsBen Skeggs
2007-06-24nouveau: NV1X/2X/3X PFIFO engtab functionsBen Skeggs
Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC entry size.
2007-06-24nouveau: NV04 PFIFO engtab functionsBen Skeggs
2007-06-24nouveau: NV4X PGRAPH engtab functionsBen Skeggs
2007-06-24nouveau: NV4X PFIFO engtab functionsBen Skeggs
2007-06-24nouveau: split PFIFO/PGRAPH context creationBen Skeggs
2007-06-24nouveau: (mostly) hook up put_base againBen Skeggs
2007-06-24nouveau: prototype PFIFO/PGRAPH engtab APIBen Skeggs
2007-06-24nouveau: rename engtab functionsBen Skeggs
2007-06-22Merge branch 'vblank-rework' into vblankJesse Barnes
2007-06-22more vblank reworkJesse Barnes
- use a timer for disabling vblank events to avoid enable/disable calls too often - make i915 work with pre-965 chips again (would like to structure this better, but this hack works on my test system)
2007-06-22radeon: Acknowledge all interrupts we're interested in.Michel Dänzer
Failure to do so was probably the root cause of fd.o bug 11287.
2007-06-22drm_modeset_ctl_t fixes.Michel Dänzer
s/u64/drm_u64_t/ to allow userspace code using drm.h to compile. Move 64 bit arg member to the beginning to avoid alignment issues with 32 bit userspace on 64 bit kernels.
2007-06-22Remove mask parameter from radeon_acknowledge_irqs().Michel Dänzer
Simply always acknowledge all interrupts we're interested in, to avoid hard hangs when an unexpected interrupt is flagged.
2007-06-21Merge branch 'vblank-rework' into vblankJesse Barnes
2007-06-21RADEON: fix race in vblank interrupt handlingJesse Barnes
It's possible that we disable vblank interrupts and clear the corresponding flag in irq_enable_reg, but receive an interrupt at just the wrong time, causing us to not ack it properly, nor report to the core kernel that it was handled. Fix that case by always handling vblank interrupts, even if the irq_enable_reg field is clear.
2007-06-21r300: Synchronized the register defines file; documentation changes.Oliver McFadden
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