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2007-03-10Merge branch 'i915-pageflip'Michel Dänzer
2007-03-10i915: Only wait for pending flips before asynchronous flips again.Michel Dänzer
2007-03-09i915: Do not wait for pending flips on both pipes at the same time.Michel Dänzer
The MI_WAIT_FOR_EVENT instruction does not support waiting for several events at once, so this should fix the lockups with page flipping when both pipes are enabled.
2007-03-07nouveau: remove a hack that's not needed since the last interface change.Ben Skeggs
2007-03-07nouveau: ack PFIFO interrupts at PFIFO, not PMC.Ben Skeggs
2007-03-07Add via CX700.Thomas Hellstrom
2007-03-04radeon: make PCI GART aperture size variable, but making table size variableDave Airlie
This is precursor to getting a TTM backend for this stuff, and also allows the PCI table to be allocated at fb 0
2007-03-04ati: make pcigart code able to handle variable size PCI GART apertureDave Airlie
This code doesn't enable a variable aperture it just modifies the codebase to allow me fix it up later
2007-02-28i915: Eliminate dev_priv->current_page.Michel Dänzer
Always use dev_priv->sarea_priv->pf_current_page directly. This allows clients to modify it as well while they hold the HW lock, e.g. in order to sync pages between pipes.
2007-02-28i915: Only clean up page flipping when the last client goes away, not any one.Michel Dänzer
2007-02-28i915: Don't emit waits for pending flips before emitting synchronous flips.Michel Dänzer
The assumption is that synchronous flips are not isolated usually, and waiting for all of them could result in stalling the pipeline for long periods of time. Also use i915_emit_mi_flush() instead of an old-fashioned way to achieve the same effect.
2007-02-28i915: Fix test for synchronous flip affecting both pipes.Michel Dänzer
2007-02-28nouveau: intrusive drm interface changesBen Skeggs
graphics objects: - No longer takes flags/dmaobj parameters, requires some major changes to the ddx to setup the object through the FIFO. This change is likely to cause breakages on some cards (tested on NV05,NV28,NV35, NV40 and NV4E). dma objects: - now takes a "class" parameter, not really used yet but we may need it at some point. - parameters are checked, so clients can't randomly create DMA objects pointing at whatever they feel like. misc: - Added FB_SIZE/AGP_SIZE getparams - Read PFIFO_INTR in PFIFO irq handler, not PMC_INTR - Dump PGRAPH trap info on PGRAPH_INTR_NOTIFY if NSOURCE isn't NOTIFICATION_PENDING.
2007-02-25drm: remove unnecessary NULL checks, and fix some indents..Jakob Bornecrantz
2007-02-22i915: Add support for scheduled buffer swaps to be done as flips.Michel Dänzer
Unfortunately, emitting asynchronous flips during vertical blank results in tearing. So we have to wait for the previous vertical blank and emit a synchronous flip.
2007-02-22Add DRM_VBLANK_FLIP.Michel Dänzer
Used to request that a scheduled buffer swap be done as a flip instead of a blit.
2007-02-19i915: Improved page flipping support, including triple buffering.Michel Dänzer
Pages are tracked independently on each pipe. Bump the minor version for 3D clients to know page flipping is usable, and bump driver date.
2007-02-19i915: Page flipping enhancements.Michel Dänzer
Leave it to the client to wait for the flip to complete when necessary, but wait for a previous flip to complete before emitting another one. This should help avoid unnecessary stalling of the ring due to pending flips. Call i915_do_cleanup_pageflip() unconditionally in preclose.
2007-02-19i915: Unify breadcrumb emission.Michel Dänzer
2007-02-16Simple fence object sample driver for via, based on idling the GPU.Thomas Hellstrom
Buffer object driver for via. Some changes to buffer object driver callbacks. Improve fence flushing.
2007-02-15Initial support for fence object classes.Thomas Hellstrom
(Fence objects belonging to different command submission mechanisms).
2007-02-14Merge branch 'ttm-vram-0-1-branch'Thomas Hellstrom
2007-02-14Remove an intel-specific hack and replace it with a fence driver callback.Thomas Hellstrom
2007-02-14nouveau: fix the build on big endian (thanks CyberFoxx)Stephane Marchesin
2007-02-14nouveau: fix memory initialization with multiple cards.B. Rathmann
2007-02-13Bugzilla Bug #9457Thomas Hellstrom
Add refcounting of user waiters to the DRM hardware lock, so that we can use the DRM_LOCK_CONT flag more conservatively. Also add a kernel waiter refcount that if nonzero transfers the lock for the kernel context, when it is released. This is useful when waiting for idle and can be used for very simple fence object driver implementations for the new memory manager. It also resolves the AIGLX startup deadlock for the sis and the via drivers. i810, i830 still require that the hardware lock is really taken so the deadlock remains for those two. I'm not sure about ffb. Anyone familiar with that code?
2007-02-12Update flags and comments.Thomas Hellstrom
2007-02-09I915 accelerated blit copy functional.Thomas Hellstrom
Fixed - to System memory copies are implemented by flipping in a cache-coherent TTM, blitting to it, and then flipping it out.
2007-02-07Warning fix: correct type of i915_mmio argument.Eric Anholt
2007-02-07Define __iomem for systems without it.Eric Anholt
2007-02-07Add chip family flags to i915 driver, and fix a missing '"' in mach64 ID list.Eric Anholt
2007-02-07Checkpoint commit.Thomas Hellstrom
Flag handling and memory type selection cleanup. glxgears won't start.
2007-02-06Implement a policy for selecting memory types.Thomas Hellstrom
2007-02-06nouveau: more work on the nv04 context switch code.Stephane Marchesin
2007-02-03nouveau: and of course, I was missing the last nv04 piece.Stephane Marchesin
2007-02-03nouveau: plugin the nv04 graph init function.Stephane Marchesin
2007-02-03nouveau: cleanup the nv04 pgraph save/restore mechanism.Stephane Marchesin
2007-02-03nouveau: fix nv04 graph routines for new register names.Stephane Marchesin
2007-02-03nouveau: rename registers to their proper names.Stephane Marchesin
2007-02-03nouveau: add NV04 registers required for PGRAPH context switching.Stephane Marchesin
2007-02-02nouveau: nv ctx switch opps the size of array was wrongMatthieu Castet
2007-02-02nouveau: nv10 ctx switch, some regs are nv17+ onlyMatthieu Castet
2007-02-02via: Try to improve command-buffer chaining.Thomas Hellstrom
Bump driver date and patchlevel.
2007-02-02Disable AGP DMA for chips with the new 3D engine.Thomas Hellstrom
2007-01-31memory manager: Make device driver aware of different memory types.Thomas Hellstrom
Memory types are either fixed (on-card or pre-bound AGP) or not fixed (dynamically bound) to an aperture. They also carry information about: 1) Whether they can be mapped cached. 2) Whether they are at all mappable. 3) Whether they need an ioremap to be accessible from kernel space. In this way VRAM memory and, for example, pre-bound AGP appear identical to the memory manager. This also makes support for unmappable VRAM simple to implement.
2007-01-28nouveau: determine chipset type at startup, instead of every time we use it.Ben Skeggs
2007-01-26make works ctx switch on nv10.Matthieu Castet
2007-01-26nouveau: oops, wrong indexing in nv17 regsPatrice Mandin
2007-01-26nouveau: read gpu type oncePatrice Mandin
2007-01-26nouveau: only save/restore nv17 regs on nv17,18 hwPatrice Mandin
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