Age | Commit message (Collapse) | Author | |
---|---|---|---|
2007-07-18 | nouveau: Make nouveau_wait_for_idle() read PTIMER. | Pekka Paalanen | |
Following my nv28 kmmio dumps, nouveau_wait_for_idle() is modified to read PTIMER and NV03_PMC_ENABLE. Also a timeout based on PTIMER value is added, so wait_for_idle() cannot stall indefinitely (unless PTIMER is halted). The timeout was selected as 1 giga-ticks, which for me is 1s. | |||
2007-07-18 | nouveau: Add read() method to Engine.timer. | Pekka Paalanen | |
This is not called from anywhere, yet. | |||
2007-07-18 | nouveau: Add bitfield names for NSOURCE and NSTATUS. | Pekka Paalanen | |
Name strings and pretty-printing in nouveau_graph_dump_trap_info(). | |||
2007-07-18 | nouveau: Replace 0x00400104 and 0x00400108 with names. | Pekka Paalanen | |
NV03_PGRAPH_NSTATUS and NV03_PGRAPH_NSOURCE. The prefix NV03 is chosen because nv10reg.h had no versioned prefix, and the code using these registers does not check card_type. | |||
2007-07-18 | fix some missing whitespace/tab | Dave Airlie | |
2007-07-18 | drm: remove drm_u64_t, replace with uint64_t everwhere | Dave Airlie | |
This might break something, stdint.h inclusion in drm.h maybe required but I'm not sure yet what platforms have it what ones don't. | |||
2007-07-16 | Add XP5 and XP10 PCI IDs. | Ian Romanick | |
2007-07-16 | Eliminate unnecessary structures and defines. | Ian Romanick | |
2007-07-17 | nouveau: Destroy PGRAPH context table on PGRAPH takedown | Ben Skeggs | |
2007-07-16 | Eliminate several useless ioctls and associated cruft. | Ian Romanick | |
The ioctlss XGI_ESC_DEVICE_INFO, XGI_ESC_MEM_COLLECT, XGI_ESC_PCIE_CHECK, XGI_ESC_GET_SCREEN_INFO, XGI_ESC_PUT_SCREEN_INFO, XGI_ESC_MMIO_INFO, and XGI_ESC_SAREA_INFO, are completely unnecessary. The will be doubly useless when the driver is converted to the DRM infrastructure. | |||
2007-07-17 | nouveau: G8x PCIEGART | Ben Skeggs | |
Actually a NV04-NV50 ttm backend for both PCI and PCIEGART, but PCIGART support for G8X using the current mm has been hacked on top of it. | |||
2007-07-16 | Correct errors in the usage of pci_map_page. | Ian Romanick | |
With these changes the driver no longer instantly hard-locks a 6600LE on a PowerPC G5. I haven't tested any 3D apps yet. | |||
2007-07-16 | Fix FreeBSD build. | Eric Anholt | |
2007-07-16 | drm: remove drm_buf_t | Dave Airlie | |
2007-07-16 | drm: detypedef ttm/bo/fence code | Dave Airlie | |
2007-07-16 | drm: remove hashtab/sman and object typedefs | Dave Airlie | |
2007-07-16 | drm: remove drmP.h internal typedefs | Dave Airlie | |
2007-07-16 | drm: remove ttm userspace typedefs | Dave Airlie | |
2007-07-16 | drm: detypedef drm.h and fixup all problems | Dave Airlie | |
2007-07-16 | drm: remove typedefs in drm.h to their own section | Dave Airlie | |
2007-07-16 | Merge branch 'drm-ttm-cleanup-branch' | Dave Airlie | |
2007-07-14 | nouveau: nv10 and nv11/15 are different | Patrice Mandin | |
2007-07-13 | applied patch from Ian Romanick fixing PCI DMA object creation code | Arthur Huillet | |
2007-07-13 | now attempting to create PCI object only when there is a pci_heap | Arthur Huillet | |
2007-07-13 | nouveau: nuke internal typedefs, and drm_device_t use. | Ben Skeggs | |
2007-07-12 | Merge branch 'master' into xgi-0-0-2 | Ian Romanick | |
2007-07-13 | nouveau: unbreak AGP | Ben Skeggs | |
2007-07-12 | nouveau: mem_alloc() returns offsets, not absolute addresses now. | Ben Skeggs | |
2007-07-12 | nouveau: nuke left over debug message | Ben Skeggs | |
2007-07-12 | nouveau: separate region_offset into map_handle and offset. | Ben Skeggs | |
2007-07-12 | fixed object creation code to not Oops on 64bits, worked around memalloc not ↵ | Arthur Huillet | |
working on 64bit for PCIGART | |||
2007-07-11 | NV50 will not attempt to use PCIGART now | Arthur Huillet | |
2007-07-11 | fixed bug that prevented PCIE cards from actually using PCIGART - NV50 will ↵ | Arthur Huillet | |
probably still have a problem | |||
2007-07-11 | nouveau/nv50: G80 fixes. | Ben Skeggs | |
Again, no hardware, so no idea if it'll even work yet. I understand how the PRAMIN setup works now, un-hardcoding stuff will come "RealSoonNow(tm)". | |||
2007-07-11 | nouveau: Some checks on userspace object handles. | Ben Skeggs | |
2007-07-11 | Merge branch 'master' into cleanup | Dave Airlie | |
Conflicts: libdrm/xf86drm.c linux-core/drm_bo.c linux-core/drm_fence.c | |||
2007-07-11 | Added support for PCIGART for PCI(E) cards. Bumped DRM interface patchlevel. | Arthur Huillet | |
2007-07-09 | Fix ioctl types. | Ian Romanick | |
I had moved code from xgi_drv.h to xgi_drm.h before changing the ioctl types for XGI_IOCTL_(FB|PCIE)_ALLOC. | |||
2007-07-09 | Move types shared with user mode to xgi_drm.h. | Ian Romanick | |
2007-07-09 | nouveau: Allocate mappable VRAM for notifiers.. | Ben Skeggs | |
2007-07-09 | nouveau: Don't be so strict on <NV50 | Ben Skeggs | |
2007-07-09 | nouveau: Avoid oops | Ben Skeggs | |
Turns out lastclose() gets called even if firstopen() has never been... | |||
2007-07-09 | nouveau/nv50: Initial channel/object support | Ben Skeggs | |
Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80. | |||
2007-07-09 | nouveau: enable reporting for all PFIFO/PGRAPH irqs | Ben Skeggs | |
2007-07-09 | nouveau: rewrite gpu object code | Ben Skeggs | |
Allows multiple references to a single object, needed to support PCI(E)GART scatter-gather DMA objects which would quickly fill PRAMIN if each channel had its own. Handle per-channel private instmem areas. This is needed to support NV50, but might be something we want to do on earlier chipsets at some point? Everything that touches PRAMIN is a GPU object. | |||
2007-07-06 | radeon: Improve vblank counter. | Michel Dänzer | |
The frame counter seems to increase only at the end of vertical blank, so we need to add 1 while in vertical blank. | |||
2007-07-03 | One more spinlock initializer cleanup. | Michel Dänzer | |
2007-06-29 | nouveau: small RAMFC cleanups | Ben Skeggs | |
2007-06-28 | nouveau: Hack around possible Xv blit adaptor breakage | Ben Skeggs | |
2007-06-28 | nouveau/nv10: Fix earlier NV1x chips | Ben Skeggs | |
Can't use nv04 code for them, since an extra field was inserted into RAMFC after DMA_PUT/GET. |