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2007-08-25nouveau: nv10: output a warning if last channel invalid, and switch to nextPatrice Mandin
2007-08-23nouveau: nv10: check some NULL pointers inside context switchPatrice Mandin
2007-08-22nouveau : fix some potential crashes with objects causing hash collisionMatthieu Castet
2007-08-22nouveau/nv40: Preserve other bits in 0x400304/0x400310 like NVIDIA do.Ben Skeggs
2007-08-22nouveau/nv40: Dump extra info on ucode state if ctx switch fails.Ben Skeggs
2007-08-22nouveau: NV4c ctx ucode.Ben Skeggs
Seems we already have a nv4c_ctx_init() somehow, a quick check shows the ucode matches it still.
2007-08-22nouveau/nv50: Correct thinko for 8800 chips + cleanup a bit.Ben Skeggs
2007-08-22nouveau: redo nv30_graph.c. Should work better, but we still lack a couple ↵Stephane Marchesin
of cards.
2007-08-22nouveau: fix the comment and debug message for PCIGART sizeStephane Marchesin
2007-08-21nouveau: Add NV44 ctx ucode. Patch from stillunknown.Ben Skeggs
Microcode is similar enough to the NV4A one that it should be able to use the same initial PGRAPH context. One day this mess will go away, honest..
2007-08-21nouveau: Poke 0x2230 on NV47 also.Ben Skeggs
Makes 0x2220 work the same way as on NV40.
2007-08-19Check also for Linux, as it's not supported on different OSPatrice Mandin
2007-08-19Function pci_get_bus_and_slot needs 2.6.19 or laterPatrice Mandin
2007-08-16Merge branch 'master' into bo-set-pinEric Anholt
2007-08-17nouveau: Detect memory on NFORCE/NFORCE2 correctly.Ben Skeggs
2007-08-15nouveau: Use count parameter in nouveau_notifier_alloc().Ben Skeggs
2007-08-15nouveau: Turn some messages into DRM_DEBUGs..Ben Skeggs
2007-08-15nouveau: Allow GART notifiers when using sgdma code.Ben Skeggs
2007-08-15nouveau: Workaround mysterious PRAMIN clobbering by the card.Ben Skeggs
2007-08-14Eliminate unused / useless ioctls.Ian Romanick
2007-08-15nouveau: Catch all NV4x chips instead of just NV_40.Ben Skeggs
2007-08-15nouveau/nv40: Fix channel scheduling.Ben Skeggs
Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels will appear to "freeze" in some circumstances.
2007-08-11i915: i965 non-secure batchbuffer bit has moved.Dave Airlie
2007-08-10nouveau/nv50: demagic instmem setup.Ben Skeggs
2007-08-10nouveau: Allow creation of gpuobjs before any other init has taken place.Ben Skeggs
2007-08-09Unify alloc and free ioctls.Ian Romanick
The DRM_XGI_PCIE_ALLOC and DRM_XGI_FB_ALLOC ioctls (and the matching free ioctls) are unified to DRM_XGI_ALLOC. The desired memory region is selected by xgi_mem_alloc::location. The region is magically encoded in xgi_mem_alloc::index, which is used to release the memory. Bump to version 0.11.0. This update requires a new DDX.
2007-08-09nouveau: silence irq handler a bitBen Skeggs
2007-08-09nouveau/nv40: add some missing pciids.Ben Skeggs
2007-08-08nouveau : nv10, nv20, nv30 : don't save all channel in the same RAMFC entryMatthieu Castet
This should improve multi fifo
2007-08-08nouveau: Always allocate drm's push buffer in VRAMBen Skeggs
Fixes #11868
2007-08-08nouveau: return channel idBen Skeggs
2007-08-08nouveau/nv50: hack up initial channel context from current stateBen Skeggs
We really should be providing static values like the nv40 PGRAPH code does, however, this will do for now to keep X at least working.
2007-08-08nouveau: enable/disable engine-specific interrupts in _init()/_takedown()Ben Skeggs
All interrupts are still masked by PMC until init is finished.
2007-08-07nouveau : fix enable irq (in the previous code all irq were masked by engineMatthieu Castet
init after irq_postinstall)
2007-08-07nouveau: Init global gpuobj list early, unbreaks sgdma code.Ben Skeggs
2007-08-06nouveau: Bump PCI GART to 16MBStephane Marchesin
2007-08-06nouveau: ouch, add nouveau_dma.[ch] files..Ben Skeggs
2007-08-06nouveau: Remove PGRAPH_SURFACE hack, it wont work now anyway.Ben Skeggs
Need to find another way of doing this, ideally someone'd hunt down which object/method controls it! The Xv blit adaptor is likely now broken on cards that have pNv->WaitVSyncPossible enabled.
2007-08-06nouveau: Give DRM its own gpu channelBen Skeggs
If your card doesn't have working context switching, it is now broken.
2007-08-06nouveau: Determine trapped channel id from active grctx on >=NV40Ben Skeggs
2007-08-06nouveau: Various internal and external API changesBen Skeggs
1. DRM_NOUVEAU_GPUOBJ_FREE Used to free GPU objects. The obvious usage case is for Gr objects, but notifiers can also be destroyed in the same way. GPU objects gain a destructor method and private data fields with this change, so other specialised cases (like notifiers) can be implemented on top of gpuobjs. 2. DRM_NOUVEAU_CHANNEL_FREE 3. DRM_NOUVEAU_CARD_INIT Ideally we'd do init during module load, but this isn't currently possible. Doing init during firstopen() is bad as X has a love of opening/closing the DRM many times during startup. Once the modesetting-101 branch is merged this can go away. IRQs are enabled in nouveau_card_init() now, rather than having the X server call drmCtlInstHandler(). We'll need this for when we give the kernel module its own channel. 4. DRM_NOUVEAU_GETPARAM Add CHIPSET_ID value, which will return the chipset id derived from NV_PMC_BOOT_0. 4. Use list_* in a few places, rather than home-brewed stuff.
2007-08-06nouveau: Pass channel struct around instead of channel id.Ben Skeggs
2007-08-03nouveau:nv10: fill and use load,save graph context functionsPatrice Mandin
2007-07-27nouveau: creating notifier in PCI memory for PCIGARTArthur Huillet
2007-07-26Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into ↵Ian Romanick
xgi-0-0-2 Conflicts: linux-core/drmP.h linux-core/drm_scatter.c
2007-07-26Replace NO_MOVE/NO_EVICT flags to buffer objects with an ioctl to set pinning.Eric Anholt
This cleans up the create/validate interfaces for this very uncommon path, and makes pinned object creation much easier to use for the X Server.
2007-07-24Fix bug preventing X server from restarting.Ian Romanick
The core DRM lastclose routine automatically destroys all mappings and releases SG memory. XP10 DRM and DDX assumed this data stayed around until module unload. xgi_bootstrap was reworked to recreate all these mappings. In addition, the drm_addmap for the GART backing store was moved into the kernel. This causes a change to the ioctl protocol and a version bump.
2007-07-21xgi_mem_alloc::offset is a hardware offset, so it should be u32, not long.Ian Romanick
2007-07-21Clean up xgi_cmd_info and associated code.Ian Romanick
There were numerous unnecessary fields in xgi_cmd_info. The remaining fields had pretty crummy names. Cut out the cruft, and rename the rest. As a result, the unused parameter "triggerCounter" to triggerHWCommandList can be removed.
2007-07-20Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.Eric Anholt
The data is now in kernel space, copied in/out as appropriate according to the This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal with those failures. This also means that XFree86 4.2.0 support for i810 DRM is lost.
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