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authorBen Skeggs <skeggsb@gmail.com>2007-08-06 22:06:52 +1000
committerBen Skeggs <skeggsb@gmail.com>2007-08-06 22:09:15 +1000
commit7a0a812ea42d80eed89b7b9993eae42c7c1b1613 (patch)
tree0f395f44343a8882f27ab242793e5729a250f4fb /shared-core
parentcf04641bc61c8bc18101713a8d95ef98e6afae7f (diff)
nouveau: Remove PGRAPH_SURFACE hack, it wont work now anyway.
Need to find another way of doing this, ideally someone'd hunt down which object/method controls it! The Xv blit adaptor is likely now broken on cards that have pNv->WaitVSyncPossible enabled.
Diffstat (limited to 'shared-core')
-rw-r--r--shared-core/nouveau_fifo.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c
index 823801f9..fd21d2f3 100644
--- a/shared-core/nouveau_fifo.c
+++ b/shared-core/nouveau_fifo.c
@@ -369,19 +369,6 @@ nouveau_fifo_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
nouveau_fifo_free(chan);
return ret;
}
-
- /* Temporary hack, to avoid breaking Xv on cards where the
- * initial context value for 0x400710 doesn't have these bits
- * set. Proper fix would be to find which object+method is
- * responsible for modifying this state.
- */
- if (dev_priv->chipset >= 0x10 && dev_priv->chipset < 0x50) {
- uint32_t tmp;
- tmp = NV_READ(NV10_PGRAPH_SURFACE) & 0x0007ff00;
- NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
- tmp = NV_READ(NV10_PGRAPH_SURFACE) | 0x00020100;
- NV_WRITE(NV10_PGRAPH_SURFACE, tmp);
- }
}
NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH,