Age | Commit message (Collapse) | Author | |
---|---|---|---|
2007-03-10 | i915: Only wait for pending flips before asynchronous flips again. | Michel Dänzer | |
2007-03-09 | i915: Do not wait for pending flips on both pipes at the same time. | Michel Dänzer | |
The MI_WAIT_FOR_EVENT instruction does not support waiting for several events at once, so this should fix the lockups with page flipping when both pipes are enabled. | |||
2007-03-07 | nouveau: remove a hack that's not needed since the last interface change. | Ben Skeggs | |
2007-03-07 | nouveau: ack PFIFO interrupts at PFIFO, not PMC. | Ben Skeggs | |
2007-02-28 | i915: Eliminate dev_priv->current_page. | Michel Dänzer | |
Always use dev_priv->sarea_priv->pf_current_page directly. This allows clients to modify it as well while they hold the HW lock, e.g. in order to sync pages between pipes. | |||
2007-02-28 | i915: Only clean up page flipping when the last client goes away, not any one. | Michel Dänzer | |
2007-02-28 | i915: Don't emit waits for pending flips before emitting synchronous flips. | Michel Dänzer | |
The assumption is that synchronous flips are not isolated usually, and waiting for all of them could result in stalling the pipeline for long periods of time. Also use i915_emit_mi_flush() instead of an old-fashioned way to achieve the same effect. | |||
2007-02-28 | i915: Fix test for synchronous flip affecting both pipes. | Michel Dänzer | |
2007-02-22 | i915: Add support for scheduled buffer swaps to be done as flips. | Michel Dänzer | |
Unfortunately, emitting asynchronous flips during vertical blank results in tearing. So we have to wait for the previous vertical blank and emit a synchronous flip. | |||
2007-02-22 | Add DRM_VBLANK_FLIP. | Michel Dänzer | |
Used to request that a scheduled buffer swap be done as a flip instead of a blit. | |||
2007-02-19 | i915: Improved page flipping support, including triple buffering. | Michel Dänzer | |
Pages are tracked independently on each pipe. Bump the minor version for 3D clients to know page flipping is usable, and bump driver date. | |||
2007-02-19 | i915: Page flipping enhancements. | Michel Dänzer | |
Leave it to the client to wait for the flip to complete when necessary, but wait for a previous flip to complete before emitting another one. This should help avoid unnecessary stalling of the ring due to pending flips. Call i915_do_cleanup_pageflip() unconditionally in preclose. | |||
2007-02-19 | i915: Unify breadcrumb emission. | Michel Dänzer | |
2007-02-09 | I915 accelerated blit copy functional. | Thomas Hellstrom | |
Fixed - to System memory copies are implemented by flipping in a cache-coherent TTM, blitting to it, and then flipping it out. | |||
2007-02-07 | Warning fix: correct type of i915_mmio argument. | Eric Anholt | |
2007-02-07 | Define __iomem for systems without it. | Eric Anholt | |
2007-02-07 | Add chip family flags to i915 driver, and fix a missing '"' in mach64 ID list. | Eric Anholt | |
2007-02-07 | Checkpoint commit. | Thomas Hellstrom | |
Flag handling and memory type selection cleanup. glxgears won't start. | |||
2007-02-06 | Implement a policy for selecting memory types. | Thomas Hellstrom | |
2007-02-06 | nouveau: more work on the nv04 context switch code. | Stephane Marchesin | |
2007-02-03 | nouveau: and of course, I was missing the last nv04 piece. | Stephane Marchesin | |
2007-02-03 | nouveau: plugin the nv04 graph init function. | Stephane Marchesin | |
2007-02-03 | nouveau: cleanup the nv04 pgraph save/restore mechanism. | Stephane Marchesin | |
2007-02-03 | nouveau: fix nv04 graph routines for new register names. | Stephane Marchesin | |
2007-02-03 | nouveau: rename registers to their proper names. | Stephane Marchesin | |
2007-02-03 | nouveau: add NV04 registers required for PGRAPH context switching. | Stephane Marchesin | |
2007-02-02 | nouveau: nv ctx switch opps the size of array was wrong | Matthieu Castet | |
2007-02-02 | nouveau: nv10 ctx switch, some regs are nv17+ only | Matthieu Castet | |
2007-02-02 | via: Try to improve command-buffer chaining. | Thomas Hellstrom | |
Bump driver date and patchlevel. | |||
2007-02-02 | Disable AGP DMA for chips with the new 3D engine. | Thomas Hellstrom | |
2007-01-31 | memory manager: Make device driver aware of different memory types. | Thomas Hellstrom | |
Memory types are either fixed (on-card or pre-bound AGP) or not fixed (dynamically bound) to an aperture. They also carry information about: 1) Whether they can be mapped cached. 2) Whether they are at all mappable. 3) Whether they need an ioremap to be accessible from kernel space. In this way VRAM memory and, for example, pre-bound AGP appear identical to the memory manager. This also makes support for unmappable VRAM simple to implement. | |||
2007-01-28 | nouveau: determine chipset type at startup, instead of every time we use it. | Ben Skeggs | |
2007-01-26 | make works ctx switch on nv10. | Matthieu Castet | |
2007-01-26 | nouveau: oops, wrong indexing in nv17 regs | Patrice Mandin | |
2007-01-26 | nouveau: read gpu type once | Patrice Mandin | |
2007-01-26 | nouveau: only save/restore nv17 regs on nv17,18 hw | Patrice Mandin | |
2007-01-26 | nouveau: add extra pgraph registers | Patrice Mandin | |
2007-01-26 | nouveau: add some nv10 pgraph defines | Patrice Mandin | |
2007-01-25 | nouveau: simplify and fix BIG_ENDIAN flags | Patrice Mandin | |
2007-01-25 | nouveau: nv4c default context | Ben Skeggs | |
2007-01-25 | nouveau: always print nsource/nstatus regs on PGRAPH errors | Ben Skeggs | |
2007-01-24 | vblank interrupt fix | Zou Nan hai | |
2007-01-19 | nouveau: fix getparam from 32-bit client on 64-bit kernel | Ben Skeggs | |
2007-01-19 | nouveau: re-add 6150 Go pciid (0x0244) | Ben Skeggs | |
2007-01-18 | nouveau: cleanup nv30_graph.c | Jeremy Kolb | |
2007-01-18 | nouveau: Remove write to CTX_SIZE. This gives us proper nv3x PGRAPH switching. | Jeremy Kolb | |
2007-01-18 | add missing quadro id | Dave Jones | |
2007-01-17 | nouveau: Try to get nv35 pgraph switching working. Doesn't quite yet. | Jeremy Kolb | |
Hook into nv20 pgraph switching functions (they're identical for nv3x). Actually call nv30_pgraph_context_init so the ctx_table is allocated. Thanks to Carlos Martin for the help. | |||
2007-01-14 | nouveau: opps nv20 ctx ramin size was wrong | Matthieu Castet | |
2007-01-13 | nouveau: opps restored the wrong channel | Matthieu Castet | |