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path: root/shared-core/radeon_cp.c
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2008-07-26radeon: add initial atombios modesetting and GEM -> TTM translation layer.Dave Airlie
This is an initial import of the atom bios parser with modesetting support for r500 hw using atombios. It also includes a simple memory manager layer that translates a radeon GEM style interface onto TTM internally. So far this memory manager has only been used for pinned object allocation for the DDX to test modesetting.
2008-05-30r500: attempt to make AGP work by programming agp base in the MC correctlyDave Airlie
2008-05-28radeon: split microcode out into a separate header file.Dave Airlie
2008-05-27RADEON: add get_param for number of GB pipesAlex Deucher
2008-05-13RS4xx: separate out RS400 and RS480 IGP chipsAlex Deucher
RS400 (intel based IGP) and RS480 (AMD based IGP) have different MC and GART setups. Currently we only support RS480.
2008-05-12RADEON: fix copy/pasto in last commitAlex Deucher
2008-05-12R3/4/5: init pipe setup in drmAlex Deucher
Similar (broken) code in mesa needs to be removed
2008-05-12RADEON: cleanup radeon_do_engine_reset()Alex Deucher
2008-05-12R300+: fixup pixcache flushAlex Deucher
2008-05-12RS4xx: fix MCIND index maskAlex Deucher
2008-05-12RADEON: write AGP_BASE_2 on chips that support itAlex Deucher
2008-05-12Radeon IGP: merge RS4xx/RS6xx gart setupAlex Deucher
2008-05-12Radeon IGP: wrap MCIND accessAlex Deucher
first step in merging rs4xx/rs6xx gart setup
2008-05-12Radeon IGP: clean up registers and magic numbersAlex Deucher
2008-03-19RADEON: switch over to new production microcodeAlex Deucher
This needs to be tested thoroughly before pushing to the kernel.
2008-03-19RADEON: production microcode for all radeons, r1xx-r6xxAlex Deucher
This updated microcode is not in use yet.
2008-03-17drm/pcigart: fix the pci gart to use the drm_pci wrapper.Dave Airlie
This is the correct fix for the RS690 and hopefully the dma coherent work. For now we limit everybody to a 32-bit DMA mask but it is possible for RS690 to use a 40-bit DMA mask for the GART table itself, and the PCIE cards can use 40-bits for the table entries. Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-03-16drm/rs690: set AGP_BASE_2 to 0Dave Airlie
2008-03-16drm: set rs690 gart base completly.Dave Airlie
The docs state bits 4-11 represent bits 32-39 of a 40-bit address
2008-01-27drm: add initial rs690 support for drm.Maciej Cencora
This adds support for configuring the RS690 GART.
2008-01-03drm: cleanup DRM_DEBUG() parametersMárton Németh
As DRM_DEBUG macro already prints out the __FUNCTION__ string (see drivers/char/drm/drmP.h), it is not worth doing this again. At some other places the ending "\n" was added. airlied:- I cleaned up a few that this patch missed also
2007-12-10Merge branch 'master' into r500-supportDave Airlie
2007-12-02bsd: Replace other occurrences of msleep with mtx_sleepRobert Noland
2007-11-27r500: add a bunch of all r5xx pci ids..Dave Airlie
fix up a range that may be needed for r500 mesa
2007-11-20radeon: add initial r5xx supportDave Airlie
2007-11-18radeon: refactor out the fb/agp location read/write.Dave Airlie
Add a new get param to get the fb location into userspace. Mesa currently hits MMIO to do this, but this isn't always possible.
2007-11-05drm: remove lots of spurious whitespace.Dave Airlie
Kernel "cleanfile" script run.
2007-11-03radeon: set the address to access the aperture on the CPU side correctlyDave Airlie
This code relied on the CPU and GPU address for the aperture being the same, On some r5xx hardware I was playing with I noticed that this isn't always true. I wonder if this will fix some of those r4xx DRI issues we've seen in the past.
2007-07-20Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.Eric Anholt
The data is now in kernel space, copied in/out as appropriate according to the This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal with those failures. This also means that XFree86 4.2.0 support for i810 DRM is lost.
2007-07-20Replace filp in ioctl arguments with drm_file *file_priv.Eric Anholt
As a fallout, replace filp storage with file_priv storage for "unique identifier of a client" all over the DRM. There is a 1:1 mapping, so this should be a noop. This could be a minor performance improvement, as everything on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls went the other direction.
2007-07-20Remove DRM_ERR OS macro.Eric Anholt
This was used to make all ioctl handlers return -errno on linux and errno on *BSD. Instead, just return -errno in shared code, and flip sign on return from shared code to *BSD code.
2007-07-16drm: remove drm_buf_tDave Airlie
2007-07-16drm: remove drmP.h internal typedefsDave Airlie
2007-07-16drm: detypedef drm.h and fixup all problemsDave Airlie
2007-06-08r300: Added the CP maximum fetch size and ring rptr update variables.Oliver McFadden
2007-06-03radeon: add support for vblank on crtc2Dave Airlie
This add support for CRTC2 vblank on radeon similiar to the i915 support
2007-05-26whitespace fixups from kernelDave Airlie
2007-04-28remove DRM_GETSAREA and replace with drm_getsarea functionDave Airlie
2007-04-09rs480: Renamed some unknown registers. See dri-devel list.Oliver McFadden
2007-04-09radeon: add support for reverse engineered xpress200mDave Airlie
The IGPGART setup code was traced using mmio-trace on fglrx by myself and Phillip Ezolt <phillipezolt@gmail.com> on dri-devel. This code doesn't let the 3D driver work properly as the card has no vertex shader support. Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this work on.
2007-03-04radeon: make PCI GART aperture size variable, but making table size variableDave Airlie
This is precursor to getting a TTM backend for this stuff, and also allows the PCI table to be allocated at fb 0
2007-03-04ati: make pcigart code able to handle variable size PCI GART apertureDave Airlie
This code doesn't enable a variable aperture it just modifies the codebase to allow me fix it up later
2007-01-11radeon: Fix u32 overflows when determining AGP base address in card space.Michel Dänzer
The overflows could lead to the AGP aperture overlapping the framebuffer area in the card's address space when the latter is located at the very end of the 32 bit address space, which would result in a freeze on X server startup, probably because the card read commands from the framebuffer instead of from AGP. See http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=392915 .
2006-09-12drm: use radeon specific names for radeon flagsDave Airlie
2006-07-26Revert "Make sure busmastering gets disabled on module unload."Michel Dänzer
This reverts af7b89d7246efbed7d05c38fcaa6a13c4b89db90 commit. It causes an oops on X server shutdown here, and for the reporter of bug #7629 as well.
2006-07-26Bug #7629: Fix for CHIP_IS_AGP getting 'restored' with non-AGP cardsMichel Dänzer
Commit 2a47f6bfecea5dabcbf79d5e1aaf271f50070b89 caused the CHIP_IS_AGP flag to get 'restored' with PCI(e) cards. I can't think of a way to fix this without introducing a (otherwise redundant) CHIP_IS_PCI flag.
2006-07-19Make sure busmastering gets disabled on module unload.Adam Jackson
2006-07-19Use RADEON_RB3D_DSTCACHE_CTLSTAT instead of RADEON_RB2D_DSTCACHE_CTLSTAT.Michel Dänzer
The latter seems to be a read-only mirror of the former.
2006-07-19Make sure CHIP_IS_AGP flag is set when not overriding to PCI mode.Michel Dänzer
This allows using AGP after overriding to PCI mode in a previous session without reloading the DRM.
2006-07-19When writeback isn't used, actually disable it in the hardware.Michel Dänzer
Not doing this might waste bus bandwidth or even cause memory corruption or system crashes on systems that check bus transfers. No such incident has been reported though.
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