diff options
| author | Michel Dänzer <michel@tungstengraphics.com> | 2006-07-19 19:13:00 +0200 |
|---|---|---|
| committer | Michel Dänzer <michel@tungstengraphics.com> | 2006-07-19 19:13:00 +0200 |
| commit | c91748e702af1c59d88a4b6c2afb20a781dc6660 (patch) | |
| tree | e6229e14bedd695a15a4a77ee7be0aafcc42d018 /shared-core/radeon_cp.c | |
| parent | e337eadcec9c1e2cf885167c076ab2407bd6c090 (diff) | |
When writeback isn't used, actually disable it in the hardware.
Not doing this might waste bus bandwidth or even cause memory corruption or
system crashes on systems that check bus transfers. No such incident has been
reported though.
Diffstat (limited to 'shared-core/radeon_cp.c')
| -rw-r--r-- | shared-core/radeon_cp.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index ccb0023f..54763fc5 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -1258,6 +1258,12 @@ static void radeon_test_writeback(drm_radeon_private_t * dev_priv) dev_priv->writeback_works = 0; DRM_INFO("writeback forced off\n"); } + + if (!dev_priv->writeback_works) { + /* Disable writeback to avoid unnecessary bus master transfers */ + RADEON_WRITE(RADEON_CP_RB_CNTL, RADEON_READ(RADEON_CP_RB_CNTL) | RADEON_RB_NO_UPDATE); + RADEON_WRITE(RADEON_SCRATCH_UMSK, 0); + } } /* Enable or disable PCI-E GART on the chip */ |