summaryrefslogtreecommitdiff
path: root/shared-core/nv40_fifo.c
AgeCommit message (Collapse)Author
2007-11-05drm: remove lots of spurious whitespace.Dave Airlie
Kernel "cleanfile" script run.
2007-08-15nouveau/nv40: Fix channel scheduling.Ben Skeggs
Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels will appear to "freeze" in some circumstances.
2007-08-10nouveau/nv50: demagic instmem setup.Ben Skeggs
2007-08-06nouveau: Pass channel struct around instead of channel id.Ben Skeggs
2007-07-13nouveau: nuke internal typedefs, and drm_device_t use.Ben Skeggs
2007-07-09nouveau/nv50: Initial channel/object supportBen Skeggs
Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80.
2007-07-09nouveau: rewrite gpu object codeBen Skeggs
Allows multiple references to a single object, needed to support PCI(E)GART scatter-gather DMA objects which would quickly fill PRAMIN if each channel had its own. Handle per-channel private instmem areas. This is needed to support NV50, but might be something we want to do on earlier chipsets at some point? Everything that touches PRAMIN is a GPU object.
2007-06-29nouveau: small RAMFC cleanupsBen Skeggs
2007-06-28nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bitBen Skeggs
2007-06-24nouveau: NV04 PFIFO engtab functionsBen Skeggs
2007-06-24nouveau: NV4X PFIFO engtab functionsBen Skeggs