Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-01-30 | nv40: some more nv67 changes | Ben Skeggs | |
With some luck the drm-side will be OK now for this chipset. | |||
2008-01-21 | nouveau: don't forget NV80. | Stephane Marchesin | |
2008-01-21 | nouveau: new card family for old card designs. | Stephane Marchesin | |
2008-01-07 | nv50: hook up timer funcs... | Ben Skeggs | |
2008-01-07 | Nouveau: ppc oops. | Stephane Marchesin | |
2008-01-07 | Nouveau: move PPC bios copy to firstopen. | Stephane Marchesin | |
2007-11-30 | nouveau: Properly identify NV40 and NV44 generation. | Maarten Maathuis | |
2007-11-16 | nouveau: also mention the number of succcessfully copied bios bytes. | Stephane Marchesin | |
2007-11-15 | nouveau: be verbose about PPC bios for now. | Stephane Marchesin | |
2007-11-15 | nouveau: use get_property instead of of_get_property on pre-2.6.22 kernels. | Stephane Marchesin | |
2007-11-15 | nouveau: Copy the PPC bios to RAMIN on init, that lets us do proper output ↵ | Stephane Marchesin | |
detection in user space. | |||
2007-11-14 | Revert "nouveau: stub superioctl" | Ben Skeggs | |
This reverts commit 2370ded79b4176d76cda1ec5f495fd33c2d566ed. Err.. didn't mean for that to slip in :) | |||
2007-11-14 | Merge branch 'fifo-cleanup' into upstream-master | Ben Skeggs | |
2007-11-14 | nouveau: funcs to determine active channel on PFIFO. | Ben Skeggs | |
2007-11-14 | nouveau: stub superioctl | Ben Skeggs | |
2007-11-05 | drm: remove lots of spurious whitespace. | Dave Airlie | |
Kernel "cleanfile" script run. | |||
2007-11-05 | nouveau: crappy ttm mm init, disabled for now. | Ben Skeggs | |
2007-10-28 | nouveau: don't touch PMC_BOOT_1 on x86, it seems to be undefined on some ↵ | Stephane Marchesin | |
early cards. | |||
2007-10-14 | nouveau: PPC fixes. These regs are very touchy. | Stephane Marchesin | |
2007-10-10 | nouveau: PMC_BOOT_1 was not mapped. | Maarten Maathuis | |
2007-10-10 | nouveau: try to fix big endian. | Stephane Marchesin | |
2007-10-07 | nouveau: A char is signed, so it may overflow for >NV50. | Maarten Maathuis | |
2007-10-04 | nouveau: Remove excess device classes. | Maarten Maathuis | |
2007-10-04 | nouveau: Switch over to using PMC_BOOT_0 for card detection. | Maarten Maathuis | |
2007-10-01 | nouveau: Fix dereferencing a NULL pointer when erroring out during ↵ | Maarten Maathuis | |
initialization. | |||
2007-09-30 | nouveau: nv30 graph function renames, removed nv20_graph.c | Pekka Paalanen | |
All nv30 functions in nv30_graph.c that can be used on nv20 are renamed as accordingly. nv20 specific parts from nv20_graph.c are moved into nv30_graph.c. | |||
2007-09-30 | nouveau: Make nv20 use the nv30 PGRAPH ctx functions. | Pekka Paalanen | |
2007-08-31 | nouveau: give nv03 the last cut. | Stephane Marchesin | |
2007-08-15 | nouveau/nv40: Fix channel scheduling. | Ben Skeggs | |
Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels will appear to "freeze" in some circumstances. | |||
2007-08-10 | nouveau: Allow creation of gpuobjs before any other init has taken place. | Ben Skeggs | |
2007-08-07 | nouveau : fix enable irq (in the previous code all irq were masked by engine | Matthieu Castet | |
init after irq_postinstall) | |||
2007-08-07 | nouveau: Init global gpuobj list early, unbreaks sgdma code. | Ben Skeggs | |
2007-08-06 | nouveau: Give DRM its own gpu channel | Ben Skeggs | |
If your card doesn't have working context switching, it is now broken. | |||
2007-08-06 | nouveau: Various internal and external API changes | Ben Skeggs | |
1. DRM_NOUVEAU_GPUOBJ_FREE Used to free GPU objects. The obvious usage case is for Gr objects, but notifiers can also be destroyed in the same way. GPU objects gain a destructor method and private data fields with this change, so other specialised cases (like notifiers) can be implemented on top of gpuobjs. 2. DRM_NOUVEAU_CHANNEL_FREE 3. DRM_NOUVEAU_CARD_INIT Ideally we'd do init during module load, but this isn't currently possible. Doing init during firstopen() is bad as X has a love of opening/closing the DRM many times during startup. Once the modesetting-101 branch is merged this can go away. IRQs are enabled in nouveau_card_init() now, rather than having the X server call drmCtlInstHandler(). We'll need this for when we give the kernel module its own channel. 4. DRM_NOUVEAU_GETPARAM Add CHIPSET_ID value, which will return the chipset id derived from NV_PMC_BOOT_0. 4. Use list_* in a few places, rather than home-brewed stuff. | |||
2007-08-06 | nouveau: Pass channel struct around instead of channel id. | Ben Skeggs | |
2007-07-20 | Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE. | Eric Anholt | |
The data is now in kernel space, copied in/out as appropriate according to the This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal with those failures. This also means that XFree86 4.2.0 support for i810 DRM is lost. | |||
2007-07-20 | Replace filp in ioctl arguments with drm_file *file_priv. | Eric Anholt | |
As a fallout, replace filp storage with file_priv storage for "unique identifier of a client" all over the DRM. There is a 1:1 mapping, so this should be a noop. This could be a minor performance improvement, as everything on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls went the other direction. | |||
2007-07-20 | Remove DRM_ERR OS macro. | Eric Anholt | |
This was used to make all ioctl handlers return -errno on linux and errno on *BSD. Instead, just return -errno in shared code, and flip sign on return from shared code to *BSD code. | |||
2007-07-18 | nouveau: Make nouveau_wait_for_idle() read PTIMER. | Pekka Paalanen | |
Following my nv28 kmmio dumps, nouveau_wait_for_idle() is modified to read PTIMER and NV03_PMC_ENABLE. Also a timeout based on PTIMER value is added, so wait_for_idle() cannot stall indefinitely (unless PTIMER is halted). The timeout was selected as 1 giga-ticks, which for me is 1s. | |||
2007-07-18 | nouveau: Add read() method to Engine.timer. | Pekka Paalanen | |
This is not called from anywhere, yet. | |||
2007-07-17 | nouveau: G8x PCIEGART | Ben Skeggs | |
Actually a NV04-NV50 ttm backend for both PCI and PCIEGART, but PCIGART support for G8X using the current mm has been hacked on top of it. | |||
2007-07-13 | nouveau: nuke internal typedefs, and drm_device_t use. | Ben Skeggs | |
2007-07-11 | fixed bug that prevented PCIE cards from actually using PCIGART - NV50 will ↵ | Arthur Huillet | |
probably still have a problem | |||
2007-07-11 | Added support for PCIGART for PCI(E) cards. Bumped DRM interface patchlevel. | Arthur Huillet | |
2007-07-09 | nouveau: Avoid oops | Ben Skeggs | |
Turns out lastclose() gets called even if firstopen() has never been... | |||
2007-07-09 | nouveau/nv50: Initial channel/object support | Ben Skeggs | |
Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80. | |||
2007-07-09 | nouveau: rewrite gpu object code | Ben Skeggs | |
Allows multiple references to a single object, needed to support PCI(E)GART scatter-gather DMA objects which would quickly fill PRAMIN if each channel had its own. Handle per-channel private instmem areas. This is needed to support NV50, but might be something we want to do on earlier chipsets at some point? Everything that touches PRAMIN is a GPU object. | |||
2007-06-28 | nouveau/nv10: Fix earlier NV1x chips | Ben Skeggs | |
Can't use nv04 code for them, since an extra field was inserted into RAMFC after DMA_PUT/GET. | |||
2007-06-28 | nouveau: simplify PRAMIN access | Ben Skeggs | |
2007-06-28 | nouveau/nv50: skeletal backend | Ben Skeggs | |