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path: root/shared-core/i915_drm.h
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2008-05-30Merge commit 'origin/master' into drm-gemEric Anholt
Conflicts: linux-core/Makefile.kernel shared-core/i915_drv.h shared-core/nouveau_state.c
2008-05-25[intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.Keith Packard
This new ioctl returns whether re-using the buffer would force a wait.
2008-05-12[GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen.Eric Anholt
2008-05-10[intel-GEM] Clean up GEM ioctl naming.Keith Packard
Rename 'validate_entry' to 'exec_object', then clean up some field names in structures (renaming buffer_offset to just offset, for example).
2008-05-08[intel-gem] Move domains to relocation records. add set_domain ioctl.Keith Packard
Domain information is about buffer relationships, not buffer contents. That means a relocation contains the domain information as it knows how the source buffer references the target buffer. This also adds the set_domain ioctl so that user space can move buffers to the cpu domain.
2008-05-07GEM: Extend cache domain stuff for 965.Eric Anholt
One of our MI_FLUSH bits is reserved on 965, being always implied, and there's a vertex cache that was forgotten.
2008-05-06Start coding up memory domainsKeith Packard
2008-05-01Add alignment to all aperture allocation requests.Keith Packard
When pinning buffers, or using execbuffer, allow the application to specify the necessary aperture allocation alignment constraints.
2008-05-01Fix gem ioctls to be 32/64-bit clean.Keith Packard
mixed 32/64 bit systems need 'special' help for ioctl where the user-space and kernel-space datatypes differ. Fixing the datatypes to be the same size, and align the same way for both 32 and 64-bit ppc and x86 environments will elimiante the need to have magic 32/64-bit ioctl translation code.
2008-05-01Add pin/unpin object ioctls for gem.Eric Anholt
2008-05-01checkpoint: relocations support.Eric Anholt
2008-05-01checkpoint: rename to GEM and a few more i915 bits.Eric Anholt
2008-04-30Hacking towards hooking up execbuffer.Eric Anholt
2008-04-23i915: fix for compatibility modeXiang, Haihao
2008-02-29Working revision.Thomas Hellstrom
2008-02-22i915: Remove leading underscore from struct tags.Kristian Høgsberg
This matches the changes in mesa to use the system drm includes for the definitions of the drm ioctl structs.
2008-02-20fix SAREAAlan Hourihane
2008-02-13i915: Add a dri2 init path that gets the lock from the dri2 sarea.Kristian Høgsberg
2008-02-13i915: Add I915_PARAM_CHIPSET_ID param to get chipset ID.Kristian Høgsberg
2008-01-24i915 make relocs use copy from userDave Airlie
Switch relocs to using copy from user and remove index and pass buffer handles in instead.
2007-11-29drm: more cleanupsDave Airlie
2007-11-22drm: major whitespace/coding style realignment with kernelDave Airlie
2007-11-22i915: add context handle to superioctl structDave Airlie
This will be used later for lockless operation.
2007-11-05drm: remove lots of spurious whitespace.Dave Airlie
Kernel "cleanfile" script run.
2007-10-12i915: add superioctl support to i915Dave Airlie
This adds the initial i915 superioctl interface. The interface should be sufficent even if the implementation may needs fixes/optimisations internally in the drm wrt caching etc.
2007-09-28Revert drm_i915_flip_t braindamageJesse Barnes
I should not have renamed this field. I should not have renamed this field. I should not have renamed this field. On the plus side, it was at least binary compatible.
2007-09-12Remove plane->pipe mapping from SAREA private after allJesse Barnes
We can figure out which pipe a given plane is mapped to by looking at the display control registers instead of tracking it in a new SAREA private field. If this becomes a performance problem, we could move to an ioctl based solution by adding a new parameter for the DDX to set (defaulting to the old behavior if the param was never set of course).
2007-09-11Disambiguate planes & pipes for swap operationsJesse Barnes
This mod makes the SAREA track plane to pipe mappings and corrects the name of the plane info variables (they were mislabeled as pipe info since until now all code assumed a direct mapping between planes and pipes). It also updates the flip ioctl argument to take a set of planes rather than pipes, since planes are flipped while pipes generate vblank events.
2007-07-16drm: detypedef drm.h and fixup all problemsDave Airlie
2007-06-05Add support for the G33, Q33, and Q35 chipsets.Wang Zhenyu
These require that the status page be referenced by a pointer in GTT, rather than phsyical memory. So, we have the X Server allocate that memory and tell us the address, instead.
2007-02-19i915: Improved page flipping support, including triple buffering.Michel Dänzer
Pages are tracked independently on each pipe. Bump the minor version for 3D clients to know page flipping is usable, and bump driver date.
2007-01-06i915: ARB_Occlusion_query(MMIO ioctl) support.Zou Nan hai
This adds a new ioctl for passing counter information from the chip back to applications, these counters include the data needed to perform OC.
2006-09-29Add SAREA fileds for determining which pipe to sync window buffer swaps to.Michel Dänzer
(cherry picked from c2bdb76814755c9ac6e66a8815f23af0fe4f3a91 commit)
2006-09-29DRM_I915_VBLANK_SWAP ioctl: Take drm_vblank_seq_type_t instead of pipe number.Michel Dänzer
Handle relative as well as absolute target sequence numbers. Return error if target sequence has already passed, so userspace can deal with this situation as it sees fit. On success, return the sequence number of the vertical blank when the buffer swap is expected to take place. Also add DRM_IOCTL_I915_VBLANK_SWAP definition for userspace code that may want to use ioctl() instead of drmCommandWriteRead(). (cherry picked from d5a0f107511e128658e2d5e15bd7e6215c507f29 commit)
2006-09-29i915: Add ioctl for scheduling buffer swaps at vertical blanks.Michel Dänzer
This uses the core facility to schedule a driver callback that will be called ASAP after the given vertical blank interrupt with the HW lock held. (cherry picked from 257771fa290b62d4d2ad896843cf3a207978d0bb commit)
2006-09-15Allow a "native type" to be associated with a fence sequence.Thomas Hellstrom
In the intel case, we can associate a flush with a sequence.
2006-09-12More bugfixes.Thomas Hellstrom
Disable the i915 IRQ turnoff for now since it seems to be causing problems.
2006-08-10i965 code and Linux coding style < 0Dave Airlie
smack my whitespace up.
2006-08-08Add support for Intel i965G chipsets.Alan Hourihane
This is a patch prepared by Guangdeng Liao based off of Tungsten Graphics's final code drop.
2006-06-19Add i915 ioctls to configure pipes for vblank interrupt.Keith Packard
i915 vblanks can be generated from either pipe a or b, however a disabled pipe generates no interrupts. This change allows the X server to select which pipe generates vblank interrupts.
2006-01-24other part of revertAlan Hourihane
2006-01-23Fix CMDBUFFER path, add heap destroy and flesh out sarea for rotationAlan Hourihane
(Tungsten Graphics)
2005-12-28Add vblank support to i915 DRM..Dave Airlie
2005-11-28Assert an MIT copyright on sis_drm.h, since one was lacking and I createdEric Anholt
that particular file. Its contents have changed a good bit since the original sis code, and the original sis code didn't care much about attribution since it routinely disclaims Precision Insight/VA Linux from responsibility. Also, adjust formatting around license headers (have a comment open immediately before the "Copyright" line, not as a runon of any previous comments) for automatic processing into FreeBSD, where /*- is used to signal the beginning of license headers for automatic compilation of license lists.
2005-06-06Fix copyrightsAlan Hourihane
2004-09-27First check in for DRM that splits core from personality modulesJon Smirl
2004-08-27run i915 through lindentDave Airlie
2004-07-25sync up with current 2.6 kernel bk tree - mostly __user annotationsDave Airlie
2004-06-10i915.o drm driverKeith Whitwell