diff options
| author | Wang Zhenyu <zhenyu.z.wang@intel.com> | 2007-06-05 11:15:29 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2007-06-05 11:15:29 -0700 |
| commit | 109e2a10f260f3a5f78762bbedcaeb9b2ebde1c0 (patch) | |
| tree | 6b968ef48f9a3592bdcc801d09c58bc0d081ebcf /shared-core/i915_drm.h | |
| parent | 5bd0ca125ed687b2dc6896197c0c8ab2673897f8 (diff) | |
Add support for the G33, Q33, and Q35 chipsets.
These require that the status page be referenced by a pointer in GTT, rather
than phsyical memory. So, we have the X Server allocate that memory and tell
us the address, instead.
Diffstat (limited to 'shared-core/i915_drm.h')
| -rw-r--r-- | shared-core/i915_drm.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/shared-core/i915_drm.h b/shared-core/i915_drm.h index 1f32313e..1c6ff4d3 100644 --- a/shared-core/i915_drm.h +++ b/shared-core/i915_drm.h @@ -159,6 +159,7 @@ typedef struct _drm_i915_sarea { #define DRM_I915_GET_VBLANK_PIPE 0x0e #define DRM_I915_VBLANK_SWAP 0x0f #define DRM_I915_MMIO 0x10 +#define DRM_I915_HWS_ADDR 0x11 #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) @@ -314,4 +315,8 @@ typedef struct drm_i915_mmio { void __user *data; } drm_i915_mmio_t; +typedef struct drm_i915_hws_addr { + uint64_t addr; +} drm_i915_hws_addr_t; + #endif /* _I915_DRM_H_ */ |