Age | Commit message (Collapse) | Author |
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The whole purpose of xgi_pcie_heap_check is to log information about
entries on the used_list. If XGI_DEBUG is not set, it doesn't print
anything. Therefore we can #ifdef the whole function body.
Convert open-code list iteration to use list_for_each_entry.
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Comment in the code explains it. Basically, I put an if-statement
around a block of code to prevent a NULL pointer dereference that
should never happen in the first place. Eventually, this will need to
come out.
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A few of the PCI-e GART related fields in struct xgi_info were
hardcoded to u32. None of them need to be. Convert them to either
unsigned int or bool.
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Documentation/CodingStyle says that 'typedef struct foo foo_t' is
evil. I tend to agree. Elminate all uses of such construct.
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This function used to return 'void *', which was then cast to
'xgi_pcie_block_t *' at the only caller. I changed the return type to
'struct xgi_pcie_block_s *' and removed the explicit cast.
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Buffer object dereference cleanup.
Add a struct drm_device member to fence objects:
This can simplify code, particularly in drivers.
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For various reasons, this ioctl was a bad idea.
At channel creation we now automatically create DMA objects covering
available VRAM and GART memory, where the client used to do this themselves.
However, there is still a need to be able to create DMA objects pointing at
specific areas of memory (ie. notifiers). Each channel is now allocated a
small amount of memory from which a client can suballocate things (such as
notifiers), and have a DMA object created which covers the suballocated area.
The NOTIFIER_ALLOC ioctl exposes this functionality.
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See attachment 10246 on https://bugs.freedesktop.org/show_bug.cgi?id=5921
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Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC
entry size.
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Commit 9b01bd5b284bbf519b726b39f1352023cb5e9e69 introduced a
compat_ioctl handler for RADEON_SETPARAM, the sole purpose of which was
to handle the fact that on i386, alignof(uint64_t)==4.
Unfortunately, this handler was installed for _all_ 64-bit
architectures, instead of only x86_64 and ia64. And thus it breaks
32-bit compatibility on every other arch, where 64-bit integers are
aligned to 8 bytes in 32-bit mode just the same as in 64-bit mode.
Arnd has a cunning plan to use 'compat_u64' with appropriate alignment
attributes according to the 32-bit ABI, but for now let's just make the
compat_radeon_cp_setparam routine entirely disappear on 64-bit machines
whose 32-bit compat support isn't for i386. It would be a no-op with
compat_u64 anyway.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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Reported by Steve Wilkins / Michel Dänzer.
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Introduce tile members for future tiled buffer support.
Allow user-space to explicitly define a fence-class.
Remove the implicit fence-class mechanism.
64-bit wide buffer object flag member.
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This reverts commit 6e860d08d0f5b1e9a2d711aaf9fd6b982aa8039e.
As I said not a good plan - this macro will have to stay for now,
trying to do the vbl code with the inline was a bit messy - may need specialised
drm wait on functions
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This add support for CRTC2 vblank on radeon similiar to the i915 support
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This cleans this code up a lot and uses the generic Linux idr which is
designed for this.
Signed-off-by: Dave Airlie <airlied@linux.ie>
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Signed-off-by: Michel Dänzer <michel@tungstengraphics.com>
Signed-off-by: Dave Airlie <airlied@linux.ie>
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