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path: root/intel/intel_bufmgr_gem.c
AgeCommit message (Expand)Author
2010-11-22intel: Compute in-aperture size for relaxed fenced objectsChris Wilson
2010-11-09intel: Fix drm_intel_gem_bo_wait_rendering to wait for read-only usage too.Eric Anholt
2010-11-07intel: initialize bufmgr.bo_mrb_exec unconditionallyAlbert Damen
2010-11-02intel: Drop silly asserts on mappings present at unmap time.Eric Anholt
2010-11-02intel: Remove gratuitous assert on bo_reference.Eric Anholt
2010-11-01intel: Remove stale comment.Eric Anholt
2010-10-29intel: enable relaxed fence allocation for i915Chris Wilson
2010-10-26intel: Prepare for BLT ring split.Chris Wilson
2010-10-01intel: Downgrade error warnings to debugChris Wilson
2010-09-25intel: Replace open-coded drmIoctl with calls to drmIoctl()Chris Wilson
2010-06-29intel: Suppress the error return from setting domains after mapping.Chris Wilson
2010-06-24intel: Limit tiled pitches to 8192 on pre-i965.Chris Wilson
2010-06-22intel: Only adjust the local stride used for SET_TILING in tiled allocChris Wilson
2010-06-22intel: Restore SET_TILING for non-flinked bo.Chris Wilson
2010-06-22intel: '===' != '=='Chris Wilson
2010-06-22intel: Sanitise strides for linear buffers and SET_TILINGChris Wilson
2010-06-21intel: Print out debugging message following ENOSPCChris Wilson
2010-06-21intel: Scan the cache for old bo once every second.Chris Wilson
2010-06-21intel: Force stride to be 0 for I915_TILING_NONE.Chris Wilson
2010-06-21intel: Defer tiling change to allocation.Chris Wilson
2010-06-21intel: Track tiling strideChris Wilson
2010-06-10intel: Fix several other paths for buffers pointing at themselves.Eric Anholt
2010-06-10intel: Add more intermediate sizes of cache buckets between powers of 2.Eric Anholt
2010-06-09intel: Convert to untiled pitches if surface is too large for tiling.Chris Wilson
2010-06-07Allow a buffer to point at itself and still get relocs.Eric Anholt
2010-06-06intel: Add support for kernel multi-ringbuffer API.Zou Nan hai
2010-05-24intel: Don't change tiling mode unless the kernel reports success.Chris Wilson
2010-05-13Revert "intel: We don't need to take the bufmgr lock whilst mapping."Chris Wilson
2010-05-11intel: query whether a buffer is reusable.Chris Wilson
2010-05-06intel: We don't need to take the bufmgr lock whilst mapping.Chris Wilson
2010-04-11intel: Use the correct size when allocating reloc_target_info arrayChris Wilson
2010-03-17intel: Align untiled buffer pitch to 64B.Eric Anholt
2010-03-17libdrm: Move intel_atomic.h to libdrm core for sharing.Pauli Nieminen
2010-03-07intel: Repeat execbuffer if interrupted by signalChris Wilson
2010-03-04intel: Only align Y-tiling pitch to the Y tile width.Eric Anholt
2010-03-04intel: Propagate some more error returnsChris Wilson
2010-03-03intel: Update the needs_fence flag of buffers on the validate list.Eric Anholt
2010-03-02intel: Don't enable execbuf2 fenced relocs unless we have execbuf2.Eric Anholt
2010-03-02intel: Don't tile-align pitch for untiled buffers.Eric Anholt
2010-03-02intel: Fix typo in conversion from IS_GEN to bufmgr_gem->gen.Eric Anholt
2010-03-02intel: add a comment about tiled buffer alloc height alignment from Mesa.Eric Anholt
2010-03-02intel: Use an integer for chipset generation instead of many conditionals.Eric Anholt
2010-03-02libdrm/intel: execbuf2 supportJesse Barnes
2010-02-25intel: Add initial support for Sandybridge, and clean up the #defines.Eric Anholt
2010-02-10intel: Handle resetting of input params after EINTR during SET_TILINGChris Wilson
2010-02-09intel: Account for potential pinned buffers hogging fencesChris Wilson
2010-02-02intel: check return value for callocDave Airlie
2009-12-08intel: Clear virtual after failing to mmap_gtt.Chris Wilson
2009-12-05intel: Expect caller to guarantee thread-safety of bo during relocChris Wilson
2009-12-02intel: Free memory before inserting bo into cache.Chris Wilson
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