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Redesigned primarily to allow us to better take advantage of BO's having
fixed GPU virtual addresses on GeForce 8 and up, and to reduce the overhead
of handling relocations on earlier chipsets.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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This adds libdrm_omap helper layer (as used by xf86-video-omap,
omapdrmtest, etc).
Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
[danvet: pushed for Rob, he doesn't yet have commit access.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Matt Turner <mattst88@gmail.com>
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The empty string used for the not case is replaced by the default
if-else clause and so causes the configure to fail in the absence of
valgrind. Which is not quite what was intended.
Instead use the common idiom of setting a variable depending on whether
the true or false branch is taken and emit the conditional code as a
second step.
Reported-by: Tobias Jakobi <liquid.acid@gmx.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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In particular, declare the hidden CPU mmaps to valgrind so that it knows
about those memory regions.
v2: Add an additional VG_CLEAR for the getparam
References: https://bugs.freedesktop.org/show_bug.cgi?id=35071
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
[anholt: Ideally valgrind should just learn about the ioctls, and
removing the clear for the non-valgrindified code feels risky.]
Reviewed-by: Eric Anholt <eric@anholt.net>
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Commit efd6e81e inadvertently broke the build by looking for "i?86" or
"x86_64" in $host_os. The correct variable to check is $host_cpu.
This was preventing libdrm_intel.so from being built.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
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This fixes a failure in 'make check' found by the tinderbox when trying to
build this code on Linux/ppc. This code is only designed to run on
Intel platforms, so don't even bother building it if we're not in that set.
Found-by: Tinderbox
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
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Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Yet another release required for new API
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So that we can pull a couple of Intel bug fixes into xf86-video-intel.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Initial test only include ttm test for stressing ttm memory
allocations.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Push the new Intel API for use by mesa.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Push the new Intel API for use by mesa.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Replace some deprecated autoconf macros and use the new libtool
syntax
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New kernel headers.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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To export new kernel API for Intel's 2010Q4 release.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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For the upcoming 2.4.22 release.
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Simple test for event frequency.
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Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
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A few good fixes landed, get them out there.
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Fixes problem that libdrm_radeon was disabled in Makefile even when configure
claimed that radeon was enabled.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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atomic ops.
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bo->referenced_in_cs is checked if bo is already in cs. Adding and removing
reference in bo is done with atomic operations to allow parallel access to a
bo from multiple contexts.
cs->id generation code quarentees there is not duplicated ids which limits
number of cs->ids to 32. If there is more cs objects rest will get id 0.
V2:
- Fix configure to check for atomics operations if libdrm_radeon is only selected.
- Make atomic operations private to libdrm.
This optimization decreases cs_write_reloc share of torcs profiling from 4.3%
to 2.6%.
Tested-by: Michel Dänzer <michel@daenzer.net>
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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intel_atomic.h includes very usefull atomic operations for
lock free parrallel access of variables. Moving these to
core libdrm for code sharing with radeon.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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The primary motivation of this release is to expose the new execbuf2
Intel API.
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The primary motivation of the release is the bug fix in commit
4f0f871730b76730ca58209181d16725b0c40184
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Signed-off-by: Alan Coopersmith <alan.coopersmith@sun.com>
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Signed-off-by: Alan Coopersmith <alan.coopersmith@sun.com>
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Conflicts:
configure.ac
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Oops, I assumed intel was always enable, but it just defaults to on.
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